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公开(公告)号:KR1020170011869A
公开(公告)日:2017-02-02
申请号:KR1020150105289
申请日:2015-07-24
Applicant: 삼성전자주식회사
CPC classification number: F21V23/005 , G02F1/133603 , G02F2001/133607 , H01L33/58
Abstract: 본발명의기술적사상에의한발광다이오드모듈은, 기판상에배치되는발광칩; 및상기기판상에서상기발광칩을감싸도록배치되는광학렌즈;를포함하고, 상기광학렌즈는, 상기발광칩을수납하는홈(groove)을내부에가지고, 돔형상의상면을가지는몸체부와, 상기몸체부의하면으로부터돌출되는고리형상의지지부;를포함하고, 상기광학렌즈는상기발광칩의상면및 측벽을감싸는형상일수 있다.
Abstract translation: 提供了一种发光二极管(LED)模块。 LED模块包括:基板上的发光芯片; 以及配置为包围发光芯片的基板上的光学透镜,其中,所述光学透镜包括主体,所述主体包括在其中容纳所述发光芯片的凹槽,并且具有圆顶形的上表面和从下部突出的环形支撑部分 身体表面。
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公开(公告)号:KR1020100086851A
公开(公告)日:2010-08-02
申请号:KR1020090006291
申请日:2009-01-23
Applicant: 삼성전자주식회사
IPC: H01L21/60
CPC classification number: H01L2224/05554 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/48091 , H01L2224/49 , H01L2224/49175 , H01L2224/49433 , H01L2924/01005 , H01L2924/01013 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/15311 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
Abstract: PURPOSE: A semiconductor package is provided to prevent a short failure between wires by unifying each operator bonding point in the wire set-up process. CONSTITUTION: A bond finger(115) is arranged on a substrate. A semiconductor chip is mounted on the substrate and is arranged on a bonding pad(114). A wire(113) electrically connects a bond finger with a bonding pad. The bond finger comprises a bonding region, a first dummy region and a second dummy region which are formed on both sides of the bonding region. The width of the boding area is wider than the width of the first dummy region and the second dummy region.
Abstract translation: 目的:提供一种半导体封装,通过在线路安装过程中统一每个操作者的接合点来防止电线之间的短路故障。 构成:粘合指状物(115)布置在基底上。 半导体芯片安装在基板上并且布置在焊盘(114)上。 电线(113)将接合指与电焊垫电连接。 接合指包括形成在接合区域两侧的接合区域,第一虚拟区域和第二虚拟区域。 编织区域的宽度比第一虚拟区域和第二虚拟区域的宽度宽。
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公开(公告)号:KR1020080058790A
公开(公告)日:2008-06-26
申请号:KR1020060132893
申请日:2006-12-22
Applicant: 삼성전자주식회사
IPC: H01L23/48
CPC classification number: H01L2224/32225 , H01L2224/4824 , H01L2224/73215 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012
Abstract: A ball grid array package having a pocket wall in a ball land part and a method for forming the same are provided to reduce a thickness thereof by attaching a solder ball within a predetermined region surround with the packet wall. A lead frame(10) is electrically connected to a semiconductor chip(40). The lead frame includes at least one lead(17,18), a ball land part(30) formed on the lead, and a pocket wall(33) protruded from a surface of the ball land part to surround a predetermined region. A body(50) is formed to surround the semiconductor chip and the lead frame. A solder ball(60) is arranged in the inside of the predetermined region surrounded by the pocket wall. The body is composed of an epoxy molding compound. The solder ball is composed of one of Sn-Pb-based compound, Sn-Ag-based compound, and Sn-Ag-Cu-based compound.
Abstract translation: 提供了具有球场部分中的凹槽壁的球栅阵列封装及其形成方法,以通过将焊球安装在包壁周围的预定区域内来减小其厚度。 引线框架(10)电连接到半导体芯片(40)。 引线框架包括至少一个引线(17,18),形成在引线上的球接地部分(30)和从球形台面的表面突出以围绕预定区域的凹槽壁(33)。 主体(50)形成为围绕半导体芯片和引线框架。 在由袋壁包围的预定区域的内部布置有焊球(60)。 身体由环氧树脂模塑料组成。 焊球由Sn-Pb系化合物,Sn-Ag系化合物和Sn-Ag-Cu类化合物中的一种构成。
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公开(公告)号:KR1020170107112A
公开(公告)日:2017-09-25
申请号:KR1020160030152
申请日:2016-03-14
Applicant: 삼성전자주식회사
IPC: B05C5/02 , H01L33/52 , H01L33/00 , B05C17/005 , B05C17/01
CPC classification number: H01L33/56 , B05B1/34 , B05C11/10 , B05C17/01 , H01L21/67126 , H01L33/502 , H01L33/507 , H01L2933/0041 , H01L2933/005
Abstract: 본발명의일 실시형태에따른수지도포장치는, 형광체함유수지를토출하는토출노즐을갖는외부몸체; 및적어도하나이상의유로를가지며, 상기외부몸체내에장착되는내부몸체;를포함할수 있다. 상기내부몸체는상기외부몸체보다짧은길이를가지는것을특징으로한다.
Abstract translation: 根据本发明的实施例的图像引导包装包括:外部主体,具有用于喷射含磷光体树脂的喷射喷嘴; 并且内体具有至少一个流动路径并安装在外体中。 内体的长度比外体短。
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公开(公告)号:KR1020050031600A
公开(公告)日:2005-04-06
申请号:KR1020030067800
申请日:2003-09-30
Applicant: 삼성전자주식회사
IPC: H01L23/48
Abstract: A lead frame of a semiconductor package is provided to increase a contact area between a molding resin and an integrated circuit chip and reduce thermal stress of a lead frame pad by forming the lead frame pad smaller than the integrated circuit chip and forming a through-hole in a center part of the lead frame pad. A lead frame of a semiconductor package includes a lead frame pad(30). An integrated circuit chip(20) is adhered on the lead frame pad. The lead frame pad has a size smaller than the size of the integrated circuit chip. A through-hole(36) is formed in a center of the lead frame pad. The lead frame pad has a curved side.
Abstract translation: 提供半导体封装的引线框架,以增加模制树脂和集成电路芯片之间的接触面积,并通过形成小于集成电路芯片的引线框架焊盘来减小引线框架焊盘的热应力,并形成通孔 在引线框架垫的中心部分。 半导体封装的引线框架包括引线框架焊盘(30)。 集成电路芯片(20)粘附在引线框架焊盘上。 引线框焊盘的尺寸小于集成电路芯片的尺寸。 在引线框架焊盘的中心形成有通孔(36)。 引线框架焊盘具有弯曲的一面。
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公开(公告)号:KR1020040042920A
公开(公告)日:2004-05-22
申请号:KR1020020070871
申请日:2002-11-14
Applicant: 삼성전자주식회사
IPC: H01L21/52
Abstract: PURPOSE: A die bonding apparatus and a die bonding method thereby are provided to be capable of exactly loading a chip on a chip loading part and removing pattern recognition failure. CONSTITUTION: A die bonding apparatus is provided with a semiconductor chip having a micro structure, a support part(100) having a plurality of grooves(108) for stably loading the semiconductor chip, and a chip loading part located at the bottom surface of the grooves for adsorbing the semiconductor chip using vacuum force. Preferably, the upper portion of the groove has a tilt surface(106). Preferably, the semiconductor chip is partially exposed to the outside of the groove. Preferably, the corner generated by the tilt surface is performed with a rounding process.
Abstract translation: 目的:提供一种芯片接合装置和芯片接合方法,以便能够将芯片精确地加载在芯片加载部分上并去除模式识别故障。 构成:芯片接合装置设置有具有微结构的半导体芯片,具有用于稳定地加载半导体芯片的多个凹槽(108)的支撑部分(100)和位于所述半导体芯片的底表面处的芯片加载部分 用于使用真空力吸附半导体芯片的槽。 优选地,槽的上部具有倾斜表面(106)。 优选地,半导体芯片部分地暴露于凹槽的外部。 优选地,通过舍入处理来执行由倾斜表面产生的角部。
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公开(公告)号:KR1020170106587A
公开(公告)日:2017-09-21
申请号:KR1020160029636
申请日:2016-03-11
Applicant: 삼성전자주식회사
CPC classification number: G01B11/002 , G01J3/462 , G01J3/50 , G01J3/505 , G01N21/253 , G01N2021/9511 , H01L33/486 , H01L33/502 , H01L33/62 , H01L2933/0033 , H01L2933/0041
Abstract: 본발명의실시형태에따른검사장치는, 광변환물질을함유한투광성수지를포함하는발광소자패키지에특정색상의빛을조사하는조명부, 상기투광성수지상에서상기발광소자패키지의이미지를획득하는카메라부, 및상기카메라부가획득한이미지로부터상기발광소자패키지의색좌표를계산하여상기발광소자패키지의불량여부를판단하는제어부를포함한다.
Abstract translation: 本发明的一个实施例的检查装置包括:照相机单元,用于获得所述光在照明单元的发光装置的图像中,透明树脂,用于照射一个特定颜色的光的发光器件封装,其包括含有光转换材料的透光性树脂 以及控制单元,用于根据相机单元获取的图像计算发光装置包装的颜色坐标,以确定发光装置包装是否有缺陷。
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公开(公告)号:KR1020070067283A
公开(公告)日:2007-06-28
申请号:KR1020050128395
申请日:2005-12-23
Applicant: 삼성전자주식회사
Inventor: 송주현
IPC: H01L23/495 , H01L23/48
CPC classification number: H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73265 , H01L2224/85385 , H01L2924/00014 , H01L2924/00
Abstract: A leadframe having an internal lead with a cavity is provided to insert the ball or stitch of a bonding wire bonded to an internal lead in a wire bonding process into a cavity by forming the cavity in a region to which the bonding wire of the internal lead is bonded. An IC chip(120) is supported by a die pad(112). An internal lead is regularly disposed in the periphery of the die pad, electrically connected to the IC chip by a bonding wire(130). An external lead is extended from the internal lead. At least one cavity(115) is formed in a region of the internal lead to which the bonding wire is bonded. The cavity can be formed on one surface or both surfaces of the internal lead.
Abstract translation: 提供具有空腔内引线的引线框架,通过在内引线接合线的区域内形成空穴,将引线接合工序中的内引线接合线的球或线迹插入到空腔中 被绑定。 IC芯片(120)由芯片焊盘(112)支撑。 内部引线规则地设置在芯片焊盘的周围,通过接合线(130)与IC芯片电连接。 外部引线从内部引线延伸。 至少一个空腔(115)形成在接合线所接合的内部引线的区域中。 空腔可以形成在内部引线的一个表面或两个表面上。
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