반도체 장치의 금속공정
    1.
    发明授权
    반도체 장치의 금속공정 失效
    金属接线方法半导体器件

    公开(公告)号:KR1019940011737B1

    公开(公告)日:1994-12-23

    申请号:KR1019910023383

    申请日:1991-12-18

    Inventor: 신흥재 하정민

    Abstract: The method includes the steps of forming an insulating layer (2) to be thinner than a half of the metallic wiring film width (W) in thickness on the lower layer (1), patterning the layer (2) to form a metallic wiring pattern, forming a metallic layer (3) to pattern the metallic layer (3), until the patterned film (2') is exposed, to form a metallic wiring film (3'), and forming a second insulating film (4). The method improves the insulating characteristic and planarization.

    Abstract translation: 该方法包括以下步骤:在下层(1)上形成厚度比金属布线膜宽度(W)的一半更薄的绝缘层(2),图案化层(2)以形成金属布线图案 形成金属层(3),以对金属层(3)进行图案化,直到图案化膜(2')露出为止,形成金属布线膜(3'),形成第2绝缘膜(4)。 该方法提高了绝缘特性和平坦化。

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