公开(公告)号：KR1020080040238A

公开(公告)日：2008-05-08

申请号：KR1020060107929

申请日：2006-11-02

Applicant: 삼성전자주식회사

Inventor： 강윤호 ,  와완기다니엘 ,  우티그마티아스 ,  김기준 ,  서동석

IPC: H01L27/115 ,  H01L21/8247

CPC classification number: C01B19/007 ,  C01P2002/52 ,  C01P2006/33 ,  C01P2006/34 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/141 ,  G11C13/0004

Abstract: A phase change material doped with Se and a PRAM comprising the same are provided to secure thermal stability at the temperature of 160 °C and more. A first and second impurity regions(S1,D1) doped with an n type impurity are defined on a substrate(40) of a p type. A gate insulating layer(42) and a gate electrode(44) are sequentially laminated on the semiconductor substrate between the first and second impurity regions. A first interlayer dielectric(46) is formed on the substrate. A contact hole is formed to expose the first impurity region. The first contact plug is filled with a conductive plug(50). A lower electrode is formed to cover the exposed part of the conductive plug. A second interlayer dielectric(62) is formed to cover the lower electrode. A via hole(h2) is formed to expose the lower electrode. The via hole is filled with a lower electrode contact layer(64). A phase change layer(66) is formed to cover the exposed part of the lower electrode contact layer. An upper electrode(68) is formed on the phase change layer.

Abstract translation: 提供了掺杂有Se的相变材料和包含其的PRAM以确保在160℃以上的温度下的热稳定性。 掺杂有n型杂质的第一和第二杂质区（S1，D1）限定在p型衬底（40）上。 在第一和第二杂质区之间的半导体衬底上依次层叠栅极绝缘层（42）和栅电极（44）。 在基板上形成第一层间电介质（46）。 形成接触孔以露出第一杂质区。 第一接触插塞填充有导电插塞（50）。 形成下电极以覆盖导电插头的暴露部分。 形成第二层间电介质（62）以覆盖下电极。 通孔（h2）形成为露出下电极。 通孔填充有下电极接触层（64）。 形成相变层66以覆盖下部电极接触层的暴露部分。 在相变层上形成上电极（68）。

公开(公告)号：KR1020090077523A

公开(公告)日：2009-07-15

申请号：KR1020080003524

申请日：2008-01-11

Applicant: 삼성전자주식회사

Inventor： 강윤선 ,  와완기다니엘 ,  우티그마티아스 ,  김기준 ,  강윤호 ,  김철규 ,  서동석 ,  이태연

IPC: H01L27/115 ,  H01L21/8247

CPC classification number: H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/148 ,  H01L45/1625 ,  C23C16/305

Abstract: A phase change material layer and a phase change memory device comprising the same are provided to achieve low melting point and high re-crystallization temperature and obtain a reduced reset current and a favorable retention property. A phase change material layer(10) adds at least one of In or Ga into Sb. The phase change material layer is formed in a range of intermetallic composition to eutectic composition. The phase change material layer may contain at least one of Sb and In, or Ga. A phase change memory device includes a storage node having a phase change material layer and switching devices connected to the storage node.

Abstract translation: 提供相变材料层和包含该相变材料层的相变存储器件以实现低熔点和高再结晶温度，并获得降低的复位电流和良好的保留性能。 相变材料层（10）将In或Ga中的至少一种添加到Sb中。 相变材料层在金属间组合物的范围内形成为共晶组成。 相变材料层可以含有Sb和In中的至少一种，或Ga。相变存储器件包括具有相变材料层的存储节点和连接到存储节点的开关装置。