公开(公告)号：KR1020080055466A

公开(公告)日：2008-06-19

申请号：KR1020060128844

申请日：2006-12-15

Applicant: 삼성전자주식회사

Inventor： 유영훈 ,  손우성 ,  우자희 ,  박정은

IPC: G02F1/133

CPC classification number: G02F1/1345 ,  G02F1/136 ,  G02F2001/136295 ,  G09G3/3648

Abstract: An array substrate is provided to form a pad electrode for receiving a control signal from the outside by using a single metal layer, thereby enhancing the reliability of connection in a pad member. A base substrate comprises a display area and a peripheral area. A pixel array is equipped within the display area. A pad member is equipped to the peripheral area and receives the control signal from the outside. A signal line(SL) transmits the control signal inputted to the pad member. A driving member outputs the driving signal to the pixel array in response to the control signal transmitted to the signal line. The signal line includes the first connection line(CL1) for transmitting a control signal inputted to the pad member to the driving member. The second connection line(CL2) is connected with the driving member electrically and transmits the control signal transmitted through the first connection line to the driving member. The first contact electrode(CE1) connects the first and second connection lines electrically.

Abstract translation: 提供阵列基板以形成用于通过使用单个金属层从外部接收控制信号的焊盘电极，从而增强焊盘构件中的连接的可靠性。 基底包括显示区域和外围区域。 显示区域内装有像素阵列。 衬垫构件装配到外围区域并从外部接收控制信号。 信号线（SL）发送输入到焊盘部件的控制信号。 驱动构件响应于发送到信号线的控制信号将驱动信号输出到像素阵列。 信号线包括用于将输入到焊盘构件的控制信号发送到驱动构件的第一连接线（CL1）。 第二连接线（CL2）与驱动部件电连接，并将通过第一连接线传输的控制信号发送到驱动部件。 第一接触电极（CE1）电连接第一和第二连接线。

公开(公告)号：KR1020080032756A

公开(公告)日：2008-04-16

申请号：KR1020060098585

申请日：2006-10-10

Applicant: 삼성전자주식회사

Inventor： 박정은 ,  이재경 ,  송영구 ,  김성훈 ,  우자희

IPC: G02F1/136

CPC classification number: G02F1/136286 ,  G02F1/1368 ,  G02F2001/136272

Abstract: An array substrate and a display panel having the same are provided to reduce a short generation rate at an area where a data line is formed, and perform a repair operation easily when short occurs in a channel area, thereby preventing malfunction of the display panel. A gate line(GL) transmits a gate signal. A data line(DL) defines a pixel area by crossing the gate line to be insulated, and transmits a data signal. A TFT(Thin Film Transistor)(T) is installed in one side of the pixel area, and outputs the data signal through a channel area(CA) in response to the gate signal. A pixel electrode(170) is formed in the pixel area to be electrically connected with the TFT, and receives the data signal through the channel area. On a plane, the channel area of the TFT is spaced from the data line as much as a predetermined distance. The TFT comprises a gate electrode(121), a semiconductor layer, a source electrode(151) and a drain electrode(152).

Abstract translation: 提供阵列基板和具有该阵列基板的显示面板以减少形成数据线的区域的短的发生速率，并且在通道区域发生短路时容易地执行维修操作，从而防止显示面板的故障。 栅极线（GL）发送栅极信号。 数据线（DL）通过与待绝缘的栅极线交叉来定义像素区域，并发送数据信号。 TFT（薄膜晶体管）（T）安装在像素区域的一侧，并响应于栅极信号通过​​沟道区域（CA）输出数据信号。 像素电极（170）形成在与TFT电连接的像素区域中，并通过沟道区域接收数据信号。 在平面上，TFT的沟道区域与数据线间隔多达预定距离。 TFT包括栅电极（121），半导体层，源电极（151）和漏电极（152）。

公开(公告)号：KR1020080043165A

公开(公告)日：2008-05-16

申请号：KR1020060111867

申请日：2006-11-13

Applicant: 삼성전자주식회사

Inventor： 박정은 ,  김희준 ,  우자희

IPC: H01L21/027 ,  G03F7/20 ,  G02F1/13

CPC classification number: G03F1/38 ,  G02F1/13 ,  H01L27/1214

Abstract: A mask and a method for manufacturing a display substrate using the same are provided to improve the manufacturing reliability of a switching element and a display substrate having the same by prevent defects such as short-circuit and open of a channel portion. A mask includes a source pattern(SEP), a drain pattern(DEP), and a slit pattern(SLP). The source pattern is formed correspondingly to a source electrode of a switching element. The drain pattern is spaced apart from the source pattern. The drain pattern defines a channel region including a first channel region formed parallel to the scan direction of an exposure device and a second channel region formed perpendicularly to the scan direction. The slit pattern has a first slit formed in the first channel region as having a first thickness and a second slit formed in the second channel region as having a second thickness. The first thickness is greater than the second thickness.

Abstract translation: 提供了一种用于制造使用其的显示基板的掩模和方法，以通过防止诸如通道部分的短路和打开等缺陷来提高开关元件和具有该开关元件的显示基板的制造可靠性。 掩模包括源图案（SEP），漏极图案（DEP）和狭缝图案（SLP）。 源极图案对应于开关元件的源极形成。 漏极图案与源图案间隔开。 漏极图案限定了包括平行于曝光装置的扫描方向形成的第一沟道区域和垂直于扫描方向形成的第二沟道区域的沟道区域。 狭缝图案具有形成在具有第一厚度的第一沟道区域中的第一狭缝和形成在第二沟道区域中的具有第二厚度的第二狭缝。 第一厚度大于第二厚度。

公开(公告)号：KR1020080026413A

公开(公告)日：2008-03-25

申请号：KR1020060091398

申请日：2006-09-20

Applicant: 삼성전자주식회사

Inventor： 김장일 ,  엄민식 ,  조형호 ,  우자희

IPC: G02F1/1343

CPC classification number: G02F1/134309 ,  G02F1/133707 ,  G02F2001/133776 ,  G02F2001/134345 ,  G02F2201/123

Abstract: An LCD(Liquid Crystal Display) is provided to widen the viewing angle through a plurality of domains and to improve image quality at each of the domains. An LCD comprises the first substrate(100), the second substrate(200), a liquid crystal layer, the first pixel electrodes(161), the second pixel electrodes(162) and common electrodes(240). The first substrate is divided into a plurality of pixel areas(PAs). The first substrate and the second substrate face each other. The liquid crystal layer is inserted between the first substrate and the second substrate. The first pixel electrode and the second pixel electrode, separated from each other, are formed at each pixel area. The common electrodes are formed on the second substrate. In each pixel area, the first pixel electrode comprises the first sub electrodes(161a), which are separated from each other, and the first connection electrode(161b), which connects the first sub electrodes to each other. Also the second pixel electrode comprises the second sub electrodes(162a), which are separated from each other, and the second connection electrode(162b), which connects the second sub electrodes to each other. Each of the first sub electrodes is arranged close to either or both of the second sub electrodes.

Abstract translation: 提供LCD（液晶显示器）以通过多个域拓宽视角并提高每个域的图像质量。 LCD包括第一基板（100），第二基板（200），液晶层，第一像素电极（161），第二像素电极（162）和公共电极（240）。 第一基板被分成多个像素区域（PA）。 第一基板和第二基板彼此面对。 液晶层插入在第一基板和第二基板之间。 在每个像素区域形成彼此分离的第一像素电极和第二像素电极。 公共电极形成在第二基板上。 在每个像素区域中，第一像素电极包括彼此分离的第一子电极（161a）和将第一子电极彼此连接的第一连接电极（161b）。 此外，第二像素电极包括彼此分离的第二子电极（162a）和将第二子电极彼此连接的第二连接电极（162b）。 每个第一子电极布置成靠近第二子电极中的一个或两个。

公开(公告)号：KR1020080032904A

公开(公告)日：2008-04-16

申请号：KR1020060099016

申请日：2006-10-11

Applicant: 삼성전자주식회사

Inventor： 우자희 ,  송영구 ,  이재경

IPC: G02F1/1343

CPC classification number: G02F1/134309 ,  G02F1/13624 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134345 ,  G02F2202/22

Abstract: A display panel is provided to enable a first point to be adjacent to a first TFT and enable a second point to be adjacent to a second TFT, thereby reducing the whole length of first and second drain electrodes. A line unit comprises first and second data lines(DL1,DL2) and a gate line(GL) to define a pixel area(PA) on a first base substrate. A first TFT(Thin Film Transistor) is connected to the first data line and the gate line to output first pixel voltage. A second TFT is connected to the second data line and the gate line to output second pixel voltage lower than the first pixel voltage. A first sub pixel electrode(118a) is contacted with an output electrode of the first TFT at a first point. A second sub pixel electrode(118b) is contacted with an output electrode of the second TFT at a second point. A second base substrate faces the first base substrate to be coupled. A common electrode is installed on the second base substrate, and faces the first and second sub pixel electrodes. A first spacing distance between a virtual line and the first and second points is larger than a second spacing distance between the gate line and the first and second points wherein the virtual line passes through the center of the pixel area in parallel to the gate line. First and second drain electrodes(112c,113c) are spaced from first and second source electrodes(112b,113b) as much as a predetermined interval on an upper part of first and second gate electrodes(112a,113a).

Abstract translation: 提供显示面板以使得第一点能够与第一TFT相邻，并且使第二点能够与第二TFT相邻，从而减小第一和第二漏电极的整个长度。 行单元包括第一和第二数据线（DL1，DL2）和用于限定第一基底上的像素区域（PA）的栅极线（GL）。 第一TFT（薄膜晶体管）连接到第一数据线和栅极线以输出第一像素电压。 第二TFT连接到第二数据线和栅极线，以输出低于第一像素电压的第二像素电压。 第一子像素电极（118a）在第一点与第一TFT的输出电极接触。 第二子像素电极（118b）在第二点与第二TFT的输出电极接触。 第二基底面对要耦合的第一基底基板。 公共电极安装在第二基底基板上，面向第一和第二子像素电极。 虚拟线与第一和第二点之间的第一间隔距离大于栅极线与第一和第二点之间的第二间隔距离，其中虚拟线平行于栅极线穿过像素区域的中心。 第一和第二漏电极（112c，113c）在第一和第二栅电极（112a，113a）的上部与第一和第二源电极（112b，113b）分开多达预定间隔。