公开(公告)号：KR1020070009321A

公开(公告)日：2007-01-18

申请号：KR1020050064479

申请日：2005-07-15

Applicant: 삼성전자주식회사

Inventor： 오민석 ,  김병준 ,  김상갑 ,  양성훈 ,  지로트라쿠날 ,  진홍기

IPC: G02F1/136

CPC classification number: H01L29/78618 ,  H01L27/124 ,  H01L29/458 ,  H01L29/66757

Abstract: A thin film transistor substrate, and a manufacturing method thereof are provided to improve a contact resistance characteristic by consecutively forming a resistant contact layer and an intermediate layer. A data conductive layer, an impurity-doped silicon layer, and an intermediate silicon layer including intrinsic silicon are sequentially formed on a substrate. The intermediate silicon layer, the impurity- doped silicon layer, and the data conductive layer are patterned to form a source electrode(25a) and a drain electrode(26a) spaced apart from the source electrode, and a resistant contact layer(355a,36a) and an intermediate layer(45a,46a) that are formed on the source electrode and the drain electrode and have substantially the same shape as the source electrode and the drain electrode. An intrinsic silicon layer including intrinsic silicon is formed on an entire surface of the substrate to form a semiconductor layer(50a) covering the intermediate layer and forming a channel part by filling between the source electrode and the drain electrode.

Abstract translation: 提供薄膜晶体管基板及其制造方法，以通过连续形成耐电接触层和中间层来改善接触电阻特性。 在衬底上依次形成数据导电层，杂质掺杂硅层和包括本征硅的中间硅层。 将中间硅层，杂质掺杂硅层和数据导电层图案化以形成与源电极间隔开的源电极（25a）和漏电极（26a），以及抗电接触层（355a，36a ）和形成在源电极和漏电极上并且具有与源电极和漏电极基本相同形状的中间层（45a，46a）。 在衬底的整个表面上形成包括本征硅的本征硅层，以形成覆盖中间层的半导体层（50a），并且通过填充源电极和漏极之间形成通道部分。