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公开(公告)号:KR1020010034174A
公开(公告)日:2001-04-25
申请号:KR1020007007800
申请日:1998-11-11
Applicant: 삼성전자주식회사
Inventor: 로그안드레이엘. , 페도토프보리스디. , 이바노프블라디미르엔. , 코로트코프알렉산더엔. , 마라쉰빅토르아이. , 피사레프세르게이비. , 포베르엔위데니스지. , 갈리치나이리나이. , 소쉰미카일피. , 니쿠린브야체스라프에스. , 쉐브사에비치보리스브이. , 오시포프올레그디. , 시린미카일유. , 이영찬 , 솔다텐코프아나톨리엔. , 정도형
IPC: G01S5/14
Abstract: PURPOSE: A receiver intended for the reception of pseudo-noise signals from the satellite radio-navigation systems is provided to reduce a code tracking error by multipath distortion and to generate a clock frequency and a heterodyne frequency signal with less frequency mixer. CONSTITUTION: A receiver for pseudo-noise signals from satellite radio-navigation systems uses the GLONASS and GPS systems. The signal outputs and the clock output of a radio-frequency converter(2) are connected respectively to the first and second signal and clock inputs of a N-channel digital correlation unit. A mixer is provided in each channel of a second signal-frequency converter in the radio-frequency converter. The output of said mixer is connected to the channel output through an amplifier with an adjustable amplification ratio and through a threshold device which are connected in series. The reference input of the second-channel mixer in the second signal-frequency converter is connected to the output of a signal with a second heterodyne frequency in an apparatus for generating clock- and heterodyne-frequency signals. A first and a second frequency splitting units are further connected in series to the apparatus. The receiver is characterized by its reduced dimensions and in that it does not include any complex elements such as a sampling circuit.
Abstract translation: 目的:提供一种用于接收来自卫星无线电导航系统的伪噪声信号的接收机,用于减少多路径失真引起的码跟踪误差,并以更少的频率混频器产生时钟频率和外差频率信号。 构成:来自卫星无线电导航系统的伪噪声信号的接收机使用GLONASS和GPS系统。 射频转换器(2)的信号输出和时钟输出分别连接到N沟道数字相关单元的第一和第二信号和时钟输入端。 在射频变换器中的第二信号 - 频率转换器的每个通道中提供混频器。 所述混频器的输出通过具有可调整放大率的放大器和通过串联连接的阈值装置连接到通道输出。 第二信号频率转换器中的第二通道混频器的参考输入在用于产生时钟和外差频率信号的装置中连接到具有第二外差频率的信号的输出。 第一和第二分频单元还与设备串联进一步连接。 接收机的特征在于其尺寸减小,并且其不包括诸如采样电路的任何复杂元件。
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公开(公告)号:KR1020010040333A
公开(公告)日:2001-05-15
申请号:KR1020007007801
申请日:1998-11-11
Applicant: 삼성전자주식회사
Inventor: 로그안드레이엘. , 페도토프보리스디. , 이바노프브라이미르엔. , 코로트코프알렉산더엔. , 마라쉰비크토르아이. , 피사레프세르게이비. , 포베르엔위데니스지. , 쉐브사에비츠보리스브이. , 소쉰믹하일피.
IPC: G01S5/04
Abstract: PURPOSE: A digital correlator is provided to solve a complicate use problem of a single processor for position search and a telecommunication by reducing a load of the processor in searching a signal with the function of a fast search. CONSTITUTION: A digital correlator includes a switch(1) for switching an input signal, a data exchange unit(2) connected to a processor through a data bus and to an output of a first, a second, a third, and a fourth integrators for controlling inputs of a digital carrier generator, a digital code generator(10), a reference C/A code generator of a SRNS GPS/GLONASS system, a first and a second decision-making units(19,20). The first and the second decision-making units(19,20) have their control inputs and outputs connected through buses to a data exchange unit. The signal inputs of the first decision-making unit(19) are connected respectively to the outputs of a second and a third integrators, while the signal inputs of the second decision-making unit(20) are connected respectively to the outputs of a first and a fourth integrators. Each decision-making unit comprises two module-defining devices, an adder having its inputs connected to the outputs of the module-defining devices, a threshold register as well as three threshold devices having their signal inputs connected respectively to the output of the adder and to the outputs of the first and second module-defining devices. The reference input of the first threshold device is connected to the first output of the threshold register, while the reference inputs of the second and third threshold devices are connected to the second output of the threshold register. The outputs of the threshold devices are further connected through an OR circuit to the input of a detection signal formatter.
Abstract translation: 目的:提供一种数字相关器,通过减少处理器在快速搜索功能中搜索信号的负载来解决用于位置搜索和通信的单个处理器的复杂使用问题。 构成:数字相关器包括用于切换输入信号的开关(1),通过数据总线连接到处理器的数据交换单元(2)和第一,第二,第三和第四积分器 用于控制数字载波发生器,数字码发生器(10),SRNS GPS / GLONASS系统的参考C / A码发生器,第一和第二决策单元(19,20)的输入。 第一和第二决策单元(19,20)将其控制输入和输出通过总线连接到数据交换单元。 第一决策单元(19)的信号输入分别连接到第二和第三积分器的输出,而第二决策单元(20)的信号输入分别连接到第一和第三积分器的输出端 和第四个集成商。 每个决策单元包括两个模块定义设备,其输入端连接到模块定义设备的输出的加法器,阈值寄存器以及其信号输入分别连接到加法器的输出端的三个阈值器件,以及 到第一和第二模块定义设备的输出。 第一阈值装置的参考输入连接到阈值寄存器的第一输出,而第二和第三阈值装置的参考输入连接到阈值寄存器的第二输出。 阈值器件的输出通过OR电路进一步连接到检测信号格式化器的输入端。
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