公开(公告)号：KR101652826B1

公开(公告)日：2016-08-31

申请号：KR1020100001878

申请日：2010-01-08

Applicant: 삼성전자주식회사 ,  서울대학교산학협력단

Inventor： 오정훈 ,  유경창 ,  박병국 ,  오경석 ,  백인규

IPC: G11C16/00 ,  G11C16/30 ,  G11C11/21

CPC classification number: G11C13/0002 ,  G11C13/0023 ,  G11C2213/71 ,  H01L27/101 ,  H01L27/102 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146

Abstract: 본발명은저항성메모리재료막을이용한반도체소자및 그구동방법에관한것이다. 본발명의일 실시예에따른반도체소자는, 기판상에적어도하나의메모리셀들을포함하는반도체소자이며, 상기적어도하나의메모리셀들은, 인가되는전압에따라각각저저항상태또는고저항상태로가역적으로스위칭되며, 서로직렬연결된단극가변저항및 양극가변저항을포함한다.

公开(公告)号：KR1020120012049A

公开(公告)日：2012-02-09

申请号：KR1020100073919

申请日：2010-07-30

Applicant: 서울대학교산학협력단

Inventor： 박병국 ,  유경창 ,  오정훈

IPC: H01L27/115 ,  H01L21/8247

CPC classification number: H01L43/08 ,  G11C13/0004 ,  H01L27/222 ,  H01L43/12

Abstract: PURPOSE: A resistive memory device with a minimized upper electrode contact and a manufacturing method thereof are provided to arrange an upper electrode with a sidewall electrode and a sidewall contact part, thereby maximally reducing area touched with a resistance variable material layer. CONSTITUTION: A resistance variable layer(30) is arranged between a lower electrode(20) and an upper electrode(70). The upper electrode is formed along one side surface of a first insulating film. The first insulating film is arranged on one side of the upper part of the resistance variable layer. The upper electrode is comprised of a sidewall contact part(56) and a sidewall electrode(52) arranged on one lateral surface of the first insulating film. The sidewall contact part is arranged on the upper part of the first insulating film in order to be connected to the sidewall electrode.

Abstract translation: 目的：提供具有最小化的上电极接触的电阻式存储器件及其制造方法，以使具有侧壁电极和侧壁接触部分的上电极布置，从而最大限度地减少用电阻可变材料层触摸的面积。 构成：电阻变化层（30）设置在下电极（20）和上电极（70）之间。 上电极沿着第一绝缘膜的一个侧面形成。 第一绝缘膜布置在电阻变化层的上部的一侧。 上电极由布置在第一绝缘膜的一个侧表面上的侧壁接触部分（56）和侧壁电极（52）组成。 侧壁接触部分布置在第一绝缘膜的上部，以便连接到侧壁电极。

公开(公告)号：KR1020110081623A

公开(公告)日：2011-07-14

申请号：KR1020100001878

申请日：2010-01-08

Applicant: 삼성전자주식회사 ,  서울대학교산학협력단

Inventor： 오정훈 ,  유경창 ,  박병국 ,  오경석 ,  백인규

IPC: G11C16/00 ,  G11C16/30 ,  G11C11/21

CPC classification number: G11C13/0002 ,  G11C13/0023 ,  G11C2213/71 ,  H01L27/101 ,  H01L27/102 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146

Abstract: PURPOSE: A semiconductor devices and a method of driving the same are provided to implement high integration by preventing the interference between nonvolatile memory cells. CONSTITUTION: In a semiconductor devices and a method of driving the same, a unit cell structure(1) comprises electrode layers(M1,M2), a bipolar resistance memory material film(RM1), and a unipolar resistance memory material film(RM2) The bipolar resistance memory material film and the unipolar resistance memory material film are formed between electrode layers which are opposite to each other. The bipolar resistance memory material film and the unipolar resistance memory material film are electrically serially connected. The electrode layers include resistance memory material films which are connected to conductive lines respectively.

Abstract translation: 目的：提供半导体器件及其驱动方法，以通过防止非易失性存储单元之间的干扰来实现高集成度。 构成：在半导体器件及其驱动方法中，单元电池结构（1）包括电极层（M1，M2），双极性电阻记忆材料膜（RM1）和单极电阻存储材料膜（RM2） 双极性电阻记忆材料膜和单极电阻记忆材料膜形成在彼此相对的电极层之间。 双极性电阻记忆材料膜和单极性电阻记忆材料膜电连接。 电极层包括分别连接到导线的电阻记忆材料膜。

公开(公告)号：KR101034975B1

公开(公告)日：2011-05-19

申请号：KR1020090062719

申请日：2009-07-09

Applicant: 서울대학교산학협력단

Inventor： 박병국 ,  유경창

IPC: H01L27/115 ,  H01L21/8247

Abstract: 본 발명은 종래 RRAM 셀 구조에 전도 경로 개폐용으로 하나 이상의 PRAM 물질층을 삽입층으로 적절히 형성함으로써, PRAM 물질층의 갯수에 따라 2bit, 4bit 등으로 MLC 동작이 가능하게 하여 결과적으로 고집적성 RRAM 어레이 구현이 가능하게 한 PRAM 물질층을 삽입층으로 갖는 RRAM 셀 및 이를 이용한 RRAM 어레이에 관한 것이다.
PRAM, RRAM, 다중저항상태, MLC, 전이금속산화물, 켈코게나이드, GST

公开(公告)号：KR101113014B1

公开(公告)日：2012-02-27

申请号：KR1020100056781

申请日：2010-06-15

Applicant: 서울대학교산학협력단

Inventor： 박병국 ,  유경창 ,  오정훈

IPC: H01L27/115 ,  H01L21/8247

Abstract: 본 발명은 저항성 메모리 소자 및 그 제조방법에 관한 것으로, 보다 상세하게는 저항 가변층에서 스위칭에 관여하는 전도 경로인 filament의 수를 최소화하여 동작의 신뢰성을 높이며 저전력 구동이 가능하도록 저항 가변층이 스페이서 구조로 형성된 저항성 메모리 소자 및 그 제조방법에 관한 것이다.

公开(公告)号：KR1020110136644A

公开(公告)日：2011-12-21

申请号：KR1020100056781

申请日：2010-06-15

Applicant: 서울대학교산학협력단

Inventor： 박병국 ,  유경창 ,  오정훈

IPC: H01L27/115 ,  H01L21/8247

CPC classification number: H01L45/04 ,  H01L21/31051 ,  H01L21/76205 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1691

Abstract: PURPOSE: An RRAM(Resistive Random Access Memory) device with a spacer structure and a fabrication method thereof are provided to improve the reliability of an operation by minimizing the number of filaments which are the conduction route taking part in switching in a resistance variable layer. CONSTITUTION: A resistance variable layer is formed in the form of spacers(42a,42b). The spacers are made of a transition metal oxide with a resistance variable characteristic. The spacers is formed in the sidewall of a first insulating layer which is filled between a bottom electrode(20) and an upper electrode(62). The first insulating layer is formed to be separated at a constant interval between trenches. A second insulating layer(54) is formed on the spacers.

Abstract translation: 目的：提供一种具有间隔结构及其制造方法的RRAM（电阻随机存取存储器）装置，通过最小化作为电阻变化层切换中的导通路径的长丝的数量来提高操作的可靠性。 构成：电阻变化层形成为间隔物（42a，42b）的形式。 间隔物由具有电阻变化特性的过渡金属氧化物制成。 间隔物形成在填充在底部电极（20）和上部电极（62）之间的第一绝缘层的侧壁中。 第一绝缘层形成为在沟槽之间以恒定的间隔分开。 在间隔件上形成第二绝缘层（54）。

公开(公告)号：KR1020110005157A

公开(公告)日：2011-01-17

申请号：KR1020090062719

申请日：2009-07-09

Applicant: 서울대학교산학협력단

Inventor： 박병국 ,  유경창

IPC: H01L27/115 ,  H01L21/8247

CPC classification number: H01L21/28273 ,  G11C13/0004 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/141

Abstract: PURPOSE: A resistive-random-access-memory(RRAM) including a phase-change-random-access-memory(PRAM) material layer as an insertion layer and the RRAM array using the same are provided to improve the integrity of the RRAM using the PRAM material layer for operating a conduction route. CONSTITUTION: One or more PRAM material layers(42) are interposed in RRAM material layers(22, 24) as insertion layers. Surrounding electrodes(32, 34) are formed on both sides of each PRAM material layer. Either of surrounding electrodes includes a protrusion part. The protrusion part protruded toward a neighboring RRAM material layer. Each PRAM material layer opens and closes a conduction route.

Abstract translation: 目的：提供包括作为插入层的相变随机存取存储器（PRAM）材料层和使用其的RRAM阵列的电阻随机存取存储器（RRAM），以提高RRAM的完整性，使用 用于操作传导路径的PRAM材料层。 构成：将一个或多个PRAM材料层（42）作为插入层插入RRAM材料层（22,24）中。 周围电极（32,34）形成在每个PRAM材料层的两侧。 周围电极中的任一个包括突出部。 突出部分向相邻的RRAM材料层突出。 每个PRAM材料层打开和关闭传导路径。