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公开(公告)号:KR1020140065829A
公开(公告)日:2014-05-30
申请号:KR1020120132765
申请日:2012-11-22
Applicant: 서울대학교산학협력단
IPC: H01L21/335 , H01L29/778 , H01L21/203
Abstract: Disclosed is a method of manufacturing nitride based semiconductor. A manufacturing method according to the present invention includes: a step of preparing a substrate; a step of forming a buffer layer to prevent a dislocation with the substrate on the substrate; a step of forming a spacer on the buffer layer; a step of forming a barrier layer to form a heterojunction structure with the spacer on the spacer; a step of forming a protective layer on the barrier layer; and a step of forming an HfO2 layer on the protective layer by RF sputtering.
Abstract translation: 公开了一种制造氮化物基半导体的方法。 根据本发明的制造方法包括:准备基板的步骤; 形成缓冲层以防止与基板上的基板的位错的步骤; 在缓冲层上形成间隔物的步骤; 形成隔离层以在间隔物上形成隔离物的异质结结构的步骤; 在阻挡层上形成保护层的步骤; 以及通过RF溅射在保护层上形成HfO 2层的步骤。
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2.
公开(公告)号:KR101274433B1
公开(公告)日:2013-06-17
申请号:KR1020110123708
申请日:2011-11-24
Applicant: 서울대학교산학협력단
IPC: H01L31/0445 , H01L31/18 , H01L31/075
CPC classification number: Y02E10/50 , Y02P70/521
Abstract: 본 발명은 실리콘 박막 태양전지의 제조 방법 및 이를 통해 제조된 실리콘 박막 태양전지에 관한 것으로, 해결하고자 하는 기술적 과제는 투명 기판과 전극층 사이에 산화마그네슘 막을 형성하여, 투명기판과 전극층 사이에 반사율을 감소시킴과 동시에 확산 투과율을 증가시키게 되므로, 실리콘 박막 태양전지의 반사율을 감소시킴으로써 효율을 증가시키는데 있다.
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公开(公告)号:KR1020110027397A
公开(公告)日:2011-03-16
申请号:KR1020090085471
申请日:2009-09-10
Applicant: 삼성디스플레이 주식회사 , 서울대학교산학협력단
CPC classification number: G06F3/0412 , G02F1/13338 , G06F3/044 , G09G3/3648
Abstract: PURPOSE: A touch sensor and a liquid crystal display having the same are provided to increase touch sensitivity by increasing the difference between voltages which is outputted from a touch sensor according to a touch event. CONSTITUTION: In a touch sensor and a liquid crystal display having the same, a plurality of Y-axis readout lines are crossed with the x-axis readout lines to be insulated from each other. A plurality of sensor units(110) are arranged in a plurality of regions which are partitioned by X-axis readout lines and Y-axis readout lines A reset(111) outputs sampling voltage based on a rest voltage. A capacity sensor(112) changes sampling voltage based on the cell gap which is variable according to touch. A first output unit(113) changes the potential of the X-axis readout lines in response to the first reset signal.
Abstract translation: 目的:提供触摸传感器和具有该触摸传感器的液晶显示器,以通过根据触摸事件增加从触摸传感器输出的电压之间的差异来提高触摸灵敏度。 构成:在触摸传感器和具有该液晶显示器的液晶显示器中,多个Y轴读出线与x轴读出线交叉以彼此绝缘。 多个传感器单元(110)被布置在由X轴读出线和Y轴读出线A分隔的多个区域中。复位(111)基于静止电压输出采样电压。 容量传感器(112)基于根据触摸可变的单元间隙改变采样电压。 第一输出单元(113)响应于第一复位信号改变X轴读出线的电位。
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公开(公告)号:KR101617791B1
公开(公告)日:2016-05-19
申请号:KR1020090085471
申请日:2009-09-10
Applicant: 삼성디스플레이 주식회사 , 서울대학교산학협력단
CPC classification number: G06F3/0412 , G02F1/13338 , G06F3/044 , G09G3/3648
Abstract: 터치센서및 이를갖는액정표시장치에서, 터치센서는영상을표시하는액정표시패널에내장되어터치이벤트를감지한다. 터치센서는터치이벤트에의한액정커패시터의정전용량의변화를 x축및 y축리드아웃라인에각각연결된기생커패시터에충전된전하량의변화로유도한다. 여기서, 기생커패시터는액정커패시터보다큰 정전용량을가지므로, 터치이벤트에의해서터치센서의출력전압의변화량이증가하고, 그결과터치센서의감도를향상시킬수 있다.
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公开(公告)号:KR101500429B1
公开(公告)日:2015-03-19
申请号:KR1020080136768
申请日:2008-12-30
Applicant: 삼성디스플레이 주식회사 , 서울대학교산학협력단
IPC: G02F1/133 , G09G3/36 , G02F1/13357 , H04N5/58
Abstract: 본 발명은 광 감지부를 포함하는 표시 장치에 관한 것이다. 상기 표시 장치는 표시 장치는 영상을 표시하는 표시 패널, 외부광을 감지하되 외부 온도에 따라 선택적으로 디스에이블되는 온도 의존적 서브 감지부를 포함하는 광 감지부 및 광 감지부의 감지 결과에 따라 표시 패널에서 표시되는 상기 영상의 휘도를 조절하는 휘도 제어부를 포함한다.
표시 장치. 광 감지부, 휘도-
公开(公告)号:KR1020130138992A
公开(公告)日:2013-12-20
申请号:KR1020120062601
申请日:2012-06-12
Applicant: 엘지전자 주식회사 , 서울대학교산학협력단
IPC: H01L29/775 , H01L21/335
Abstract: The present invention relates to a semiconductor device, especially to a nitride-based heterojuction semiconductor device and a method for manufacturing the same. The present invention includes a nitride semiconductor buffer layer; a barrier layer located on the buffer layer; a cap layer located on the barrier layer; a source electrode and a drain electrode located on the cap layer; a dielectric layer including gallium located between the source electrode and the drain electrode on the cap layer; and a gate electrode located between the source electrode and the drain electrode on the cap layer.
Abstract translation: 本发明涉及一种半导体器件,特别涉及一种基于氮化物的杂质半导体器件及其制造方法。 本发明包括氮化物半导体缓冲层; 位于所述缓冲层上的阻挡层; 位于阻挡层上的盖层; 位于盖层上的源电极和漏电极; 介电层,包括位于盖层上的源电极和漏电极之间的镓; 位于盖层上的源电极和漏电极之间的栅电极。
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公开(公告)号:KR1020130087915A
公开(公告)日:2013-08-07
申请号:KR1020120009173
申请日:2012-01-30
Applicant: 서울대학교산학협력단
IPC: H01L29/786 , H01L21/336
CPC classification number: H01L29/42384 , H01L29/66742 , H01L29/7869
Abstract: PURPOSE: A thin film transistor and a manufacturing method thereof are provided to improve the reverse bias property of the thin film transistor by laminating a gate insulating layer of magnesium oxide on the upper part of a silicon oxide layer. CONSTITUTION: A gate (120) is formed on a substrate (110). A first gate insulating layer (130) is formed on the gate and the substrate in order to cover the gate. A second gate insulating layer (140) of magnesium oxide is formed on the first gate insulating layer. A semiconductor layer (150) is formed on the second gate insulating layer in order to correspond to the gate. A source and a drain electrode (160) are formed on the second gate insulating layer.
Abstract translation: 目的:提供薄膜晶体管及其制造方法,以通过在氧化硅层的上部层叠氧化镁的栅极绝缘层来提高薄膜晶体管的反向偏置特性。 构成:在衬底(110)上形成栅极(120)。 为了覆盖栅极,在栅极和基板上形成第一栅极绝缘层(130)。 在第一栅极绝缘层上形成氧化镁的第二栅极绝缘层(140)。 在第二栅极绝缘层上形成半导体层(150),以对应于栅极。 源极和漏极(160)形成在第二栅极绝缘层上。
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8.
公开(公告)号:KR1020130057788A
公开(公告)日:2013-06-03
申请号:KR1020110123709
申请日:2011-11-24
Applicant: 서울대학교산학협력단
IPC: H01L31/0445 , H01L31/18 , H01L31/075
CPC classification number: Y02E10/50 , Y02P70/521 , H01L31/0445 , H01L31/075 , H01L31/18
Abstract: PURPOSE: A method for manufacturing a silicon thin film solar cell and the silicon thin film solar cell manufactured by the method are provided to reduce reflectivity by forming an aluminum oxide layer between a transparent substrate and an electrode layer. CONSTITUTION: An aluminum oxide layer is formed in a transparent substrate(S2). A first electrode layer is formed on the aluminum oxide layer(S3). A first antireflection layer is formed on the first electrode layer(S4). A silicon layer is formed on the first antireflection layer(S6). A second electrode layer is formed on the silicon layer(S8). [Reference numerals] (AA) Start; (BB) End; (S1) Prepare a substrate; (S2) Form an aluminum oxide layer; (S3) Form a first electrode layer; (S4) Form a first antireflection layer; (S5) Form a protective layer; (S6) Form a silicon layer; (S7) Form a second antireflection layer; (S8) Form a second electrode layer
Abstract translation: 目的:提供一种制造硅薄膜太阳能电池的方法和通过该方法制造的硅薄膜太阳能电池,以通过在透明基板和电极层之间形成氧化铝层来降低反射率。 构成:在透明基板(S2)中形成氧化铝层。 在氧化铝层上形成第一电极层(S3)。 在第一电极层上形成第一抗反射层(S4)。 在第一抗反射层上形成硅层(S6)。 在硅层上形成第二电极层(S8)。 (附图标记)(AA)开始; (BB)结束; (S1)准备底物; (S2)形成氧化铝层; (S3)形成第一电极层; (S4)形成第一抗反射层; (S5)形成保护层; (S6)形成硅层; (S7)形成第二抗反射层; (S8)形成第二电极层
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公开(公告)号:KR1020130047250A
公开(公告)日:2013-05-08
申请号:KR1020110112166
申请日:2011-10-31
Applicant: 서울대학교산학협력단
IPC: H01L29/786 , G09F9/00
CPC classification number: H01L29/7869 , H01L27/1225 , H01L27/1248 , H01L29/78606
Abstract: PURPOSE: A thin film transistor and a flexible display using the same are provided to reduce a threshold voltage shift by forming a passivation layer with fluoropolymers. CONSTITUTION: A passivation layer is formed on the upper side of an active layer and includes fluoropolymers. The passivation layer is formed by using CYTOP among the fluoropolymers. The passivation layer is formed by a spin coating method when the fluoropolymers are dissolved. The passivation layer is annealed at 180 degrees centigrade after the spin coating method is performed.
Abstract translation: 目的:提供薄膜晶体管和使用其的柔性显示器,以通过用含氟聚合物形成钝化层来减小阈值电压偏移。 构成:钝化层形成在活性层的上侧,并且包括含氟聚合物。 通过在含氟聚合物中使用CYTOP形成钝化层。 当氟聚合物溶解时,通过旋涂法形成钝化层。 在进行旋涂法之后,钝化层在180摄氏度下退火。
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公开(公告)号:KR1020130033732A
公开(公告)日:2013-04-04
申请号:KR1020110097595
申请日:2011-09-27
Applicant: 서울대학교산학협력단
IPC: H01L29/786 , H01L21/336
CPC classification number: H01L29/66765 , H01L29/66969 , H01L29/7869 , H01L29/66742 , H01L29/78606
Abstract: PURPOSE: A method for manufacturing a thin film transistor is provided to simplify manufacturing processes by forming a channel layer and an etch stop layer during two etching processes using one photoresist pattern. CONSTITUTION: A gate insulation layer to cover a gate and a substrate, a semiconductor layer, and an insulation layer for stopping an etching process are formed on the substrate with the gate(S1). A photoresist pattern corresponding to the gate is formed on the insulation layer for stopping the etching process(S2). The insulation layer and the semiconductor layer are patterned to an etch stop layer and a channel layer by etching the insulation layer and the semiconductor layer in a first etching process(S3). Both sides of the channel layer are exposed to the outside by etching the side of the etch stop layer and the photoresist pattern in a second etching process(S4). The photoresist pattern is removed from the upper side of the etch stop layer(S5). A source and a drain are formed on both exposed sides of the channel layer(S6). A protection layer which covers the etch stop layer, the source, and the drain, and a contact electrically connected to the source and the drain are formed(S7). [Reference numerals] (AA) Start; (BB) End; (S11) Forming a gate; (S12) Forming a gate insulation layer; (S13) Forming a semiconductor layer; (S14) Forming an insulation layer for stopping an etching process; (S2) Forming a photoresist pattern; (S3) First etching; (S4) Second etching; (S5) Removing the photoresist; (S6) Forming a source and a drain; (S7) Forming a protection layer and a contact;
Abstract translation: 目的:提供一种用于制造薄膜晶体管的方法,以通过在使用一个光致抗蚀剂图案的两个蚀刻工艺期间形成沟道层和蚀刻停止层来简化制造工艺。 构成:在栅极(S1)的基板上形成用于覆盖栅极和栅极的栅绝缘层,半导体层和用于停止蚀刻工艺的绝缘层。 在绝缘层上形成对应于栅极的光刻胶图案,以停止蚀刻工艺(S2)。 通过在第一蚀刻工艺中蚀刻绝缘层和半导体层,将绝缘层和半导体层图案化为蚀刻停止层和沟道层(S3)。 通过在第二蚀刻工艺中蚀刻蚀刻停止层和光致抗蚀剂图案的侧面,通道层的两侧暴露于外部(S4)。 从蚀刻停止层的上侧去除光刻胶图案(S5)。 源极和漏极形成在沟道层的两个暴露侧上(S6)。 形成覆盖蚀刻停止层,源极和漏极的保护层和电连接到源极和漏极的触点(S7)。 (附图标记)(AA)开始; (BB)结束; (S11)形成门; (S12)形成栅绝缘层; (S13)形成半导体层; (S14)形成用于停止蚀刻工艺的绝缘层; (S2)形成光致抗蚀剂图案; (S3)第一蚀刻; (S4)第二蚀刻; (S5)去除光致抗蚀剂; (S6)形成源头和排水沟; (S7)形成保护层和接触件;
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