公开(公告)号：KR1020120088145A

公开(公告)日：2012-08-08

申请号：KR1020110009284

申请日：2011-01-31

Applicant: 성균관대학교산학협력단

Inventor： 최병덕 ,  박현애 ,  최평호 ,  구형석

IPC: H01L29/786 ,  G02F1/136

CPC classification number: H01L29/78606 ,  H01L27/1248

Abstract: PURPOSE: A passivation structure with a multilayer film and a thin film transistor including the same are provided to effectively block external contamination, oxygen and the moisture by using the multilayer film passivation structure. CONSTITUTION: A gate electrode(2) is formed on the upper part of a substrate(1) by depositing metal materials. An insulating layer(3) is deposited on the upper part of the gate electrode by a PECVD(Plasma Enhanced Chemical Vapor Deposition) process. A channel layer(4) is formed on the central part of the insulating layer. A source electrode(5a) is deposited on one side of the channel layer by an evaporation method. A multilayer film passivation(6) is deposited on the upper part of the channel layer, the source electrode and a drain electrode(5b).

Abstract translation: 目的：提供具有多层膜的钝化结构和包括其的薄膜晶体管，以通过使用多层膜钝化结构来有效地阻挡外部污染，氧气和水分。 构成：通过沉积金属材料在基板（1）的上部形成栅电极（2）。 通过PECVD（等离子体增强化学气相沉积）工艺在栅电极的上部沉积绝缘层（3）。 沟道层（4）形成在绝缘层的中心部分上。 源电极（5a）通过蒸发法沉积在沟道层的一侧上。 在沟道层的上部，源电极和漏极（5b）上沉积多层膜钝化（6）。