公开(公告)号：KR1020030069779A

公开(公告)日：2003-08-27

申请号：KR1020020065467

申请日：2002-10-25

Applicant: 재단법인서울대학교산학협력재단

Inventor： 송인혁 ,  한민구 ,  김천홍

IPC: H01L29/786

CPC classification number: H01L29/66757 ,  H01L27/1281 ,  H01L29/78606 ,  H01L29/78675

Abstract: PURPOSE: A thin film transistor(TFT) and a fabricating method therefor are provided to form a polycrystalline silicon TFT having high mobility, a low leakage current and excellent electrical reliability regarding high temperature carrier stress by growing uniform grains not smaller than 4 micrometer so that one grain boundary is formed in a channel region. CONSTITUTION: An insulated substrate is prepared. A heat intercepting layer is disposed on the insulated substrate in a predetermined channel formation region, made of a material that has low heat conductivity to control vertical heat transfer in an annealing process. A semiconductor layer is formed on the insulated substrate and the heat intercepting layer, having a source region, a drain region and a channel region between the source region and the drain region such that the channel region overlaps the heat intercepting layer. An insulation layer is formed on the semiconductor layer in the channel region. A gate electrode is formed on the insulation layer, overlapping the channel region.

Abstract translation: 目的：提供薄膜晶体管（TFT）及其制造方法，以通过生长不小于4微米的均匀晶粒来形成具有高迁移率，低漏电流和低温载流子应力的优异电可靠性的多晶硅TFT， 在沟道区域形成一个晶界。 构成：准备绝缘基板。 热绝缘层设置在预定通道形成区域中的绝缘基板上，该材料由热导率低的材料制成，以在退火过程中控制垂直传热。 在绝缘基板和截流层上形成半导体层，该源极区域，漏极区域和源极区域与漏极区域之间的沟道区域，使得沟道区域与热拦截层重叠。 在沟道区域的半导体层上形成绝缘层。 在绝缘层上形成栅极电极，与沟道区域重叠。