메가비트 디램(DRAM)을 위한 스마트(SMART)캐패시터 셀 및 그 제조방법
    2.
    发明授权
    메가비트 디램(DRAM)을 위한 스마트(SMART)캐패시터 셀 및 그 제조방법 失效
    自熔合并电阻电容器电容器及其制造方法

    公开(公告)号:KR1019910001984B1

    公开(公告)日:1991-03-30

    申请号:KR1019880010795

    申请日:1988-08-25

    Abstract: SMART (Selfaligned Merged And Registered Trench) Capacitor for mega DRAM is manufactured by; forming a trench in P--type epitaxial layer (34) grown on the P+-type Si-substrate (35); forming a poly-Si (38) at inner side of trench; forming field oxide (39) on the top of trench; forming a P-wall (43) and source (42)-drain (44) on P-type epitaxial layer; forming a gate oxide (36); forming side walls (49) and gate electrode (30) on the gate oxide; forming a electrode (40) connecting to the source (42) through contact hole of oxide film (41). Specically the poly-Si is deposited by LPCVD method.

    Abstract translation: SMART(自对准合并和注册沟槽)大容量DRAM的电容由...制造; 在P +型Si衬底(35)上生长的P型外延层(34)中形成沟槽; 在沟槽的内侧形成多晶硅(38); 在沟槽顶部形成场氧化物(39); 在P型外延层上形成P-壁(43)和源极(42) - 引线(44) 形成栅极氧化物(36); 在栅极氧化物上形成侧壁(49)和栅电极(30); 通过氧化膜(41)的接触孔形成连接到源极(42)的电极(40)。 特别地,通过LPCVD法沉积多晶硅。

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