公开(公告)号：KR100833517B1

公开(公告)日：2008-05-29

申请号：KR1020070043803

申请日：2007-05-04

Applicant: 한국전자통신연구원

Inventor： 송기봉 ,  김경암 ,  이상수 ,  조두희

IPC: H01B1/02

CPC classification number: C01B19/002 ,  C01P2002/72 ,  C01P2006/60

Abstract: A photoelectric material, a method for preparing the photoelectric material, and a photoelectric device containing the photoelectric material are provided to obtain excellent photoelectric effect without using rare indium or harmful cadmium. A photoelectric material is represented by AXYY', wherein A is an element of the group 11; X is an element of the group 15; and Y and Y' are identical or different each other and are an element of the group 16 in the periodic table. Preferably A is copper(Cu), X is arsenic(As), Y is sulfur(S), and Y' is selenium(Se). The photoelectric material is prepared by depositing a first material represented by X2Y3 on a substrate; depositing a second material represented by AY'2 on the first material; and heat treating the first material and the second material.

Abstract translation: 提供光电材料，光电材料的制备方法和含有光电材料的光电装置，以在不使用稀有铟或有害镉的情况下获得优异的光电效应。 光电材料由AXYY'表示，其中A是组11的元素; X是组15的元素; Y和Y'彼此相同或不同，并且是周期表中第16族的元素。 优选A是铜（Cu），X是砷（As），Y是硫（S），Y'是硒（Se）。 通过将由X2Y3表示的第一材料沉积在基板上来制备光电材料; 将由AY'2表示的第二材料沉积在第一材料上; 并对第一材料和第二材料进行热处理。

公开(公告)号：KR100859708B1

公开(公告)日：2008-09-23

申请号：KR1020060120079

申请日：2006-11-30

Applicant: 한국전자통신연구원

Inventor： 이상수 ,  송기봉 ,  조두희 ,  김경암

IPC: H01L31/0272 ,  H01L29/786 ,  H01L31/14 ,  H01L31/103

Abstract: 본 발명은 n-형 CIS와 p-형 CuSe를 이용한 이종접합 다이오드를 제공한다. 본 발명의 이종접합 다이오드는 기판; 상기 기판 상에 형성된 n-형의 CIS층; 상기 n-형의 CIS층 상에 형성된 p-형의 CuSe층; 상기 n-형의 CIS 층과 전기적으로 연결된 제1 전극층; 및 상기 p-형의 CuSe 층과 전기적으로 연결된 제2 전극;을 포함한다. 이와 같은 n-형 CIS와 p-형 CuSe를 이용한 이종접합 다이오드는 정류특성을 가질 뿐만 아니라 빛을 조사할 경우 빛을 조사하지 않은 경우에 비하여 전류의 크기가 더 세지는 광특성을 보인다.
n-형 CIS, p-형 CuSe, 이종접합 다이오드, 광특성

公开(公告)号：KR1020080032590A

公开(公告)日：2008-04-15

申请号：KR1020070037955

申请日：2007-04-18

Applicant: 한국전자통신연구원

Inventor： 송기봉 ,  조두희 ,  김경암 ,  이상수

IPC: H01L29/786

CPC classification number: H01L29/78681 ,  H01L29/26

Abstract: A thin film transistor having a chalcogenide layer and a fabrication method thereof are provided to utilize the chalcogenide layer as an optical conductive layer, and to compose an optical or electrical thin film transistor by applying the rectification function of a diode. An amorphous chalcogenide layer(205a) forms a channel layer. A crystalline chalcogenide layer(205b) is formed on both sides of the amorphous layer to form a source region and a drain region. A source and drain electrodes(210,215) are formed on both sides of the amorphous chalcogenide layer and connected to the source and drain regions of the crystalline chalcogenide layer, respectively. A gate electrode is formed on or under the channel layer with a gate insulation layer being interposed between the channel layer and the gate electrode.

Abstract translation: 提供具有硫族化物层的薄膜晶体管及其制造方法，以利用硫族化物层作为光导体层，并通过施加二极管的整流功能来构成光电薄膜晶体管或电薄膜晶体管。 无定形硫族化物层（205a）形成通道层。 在非晶层的两侧形成结晶硫族化物层（205b），形成源极区域和漏极区域。 源极和漏极（210,215）分别形成在非晶态硫族化物层的两侧，并分别连接到结晶硫族化物层的源极和漏极区。 栅极电极形成在沟道层上或下面，栅极绝缘层介于沟道层和栅电极之间。

公开(公告)号：KR100819121B1

公开(公告)日：2008-04-03

申请号：KR1020070036583

申请日：2007-04-13

Applicant: 한국전자통신연구원

Inventor： 조두희 ,  송기봉 ,  이상수 ,  김경암 ,  박봉제 ,  박상희

IPC: H01L31/0749 ,  H01L31/0445 ,  H01L31/18

CPC classification number: Y02E10/50 ,  Y02P70/521 ,  H01L31/0749 ,  H01L31/0445 ,  H01L31/18

Abstract: A method for forming a cadmium sulfide thin film and a cadmium sulfide diode by using chemical bath deposition is provided to form a Cd(Cu)S thin film and a CdS thin film in thick and uniform by additionally using ammonium chloride and triethylamine. A substrate(11) is immersed in a solution containing at least one Cd salt, at least one Cu salt, at least one sulphur source, ammonia, ammonium chloride and triethylamine to form a Cd(Cu)S thin film. The Cd salt comprises cadmium chloride(CdCl2), cadmium sulfide(CdSO4) or cadmium acetate(Cd(CH3COO)2). The Cu salt comprises copper sulfate(CuSO4). The solution is stored in a reactor, and the reactor is heated by a temperature of 45 to 65 °C during 20 to 60 minutes.

Abstract translation: 通过使用化学浴沉积法形成硫化镉薄膜和硫化镉二极管的方法，通过另外使用氯化铵和三乙胺形成Cd（Cu）S薄膜和厚度均匀的CdS薄膜。 将基材（11）浸入含有至少一种Cd盐，至少一种Cu盐，至少一种硫源，氨，氯化铵和三乙胺的溶液中以形成Cd（Cu）S薄膜。 镉盐包括氯化镉（CdCl2），硫化镉（CdSO4）或乙酸镉（镉（CH3COO）2）。 Cu盐包括硫酸铜（CuSO4）。 将溶液储存在反应器中，并将反应器在45至65℃的温度下加热20至60分钟。

公开(公告)号：KR100853197B1

公开(公告)日：2008-08-20

申请号：KR1020070024691

申请日：2007-03-13

Applicant: 한국전자통신연구원

Inventor： 송기봉 ,  서정대 ,  이상수 ,  조두희 ,  김경암

IPC: H01L29/786

CPC classification number: H01L29/24 ,  H01L29/78681

Abstract: A method for fabricating p-type and n-type CIS(CuInSe2) thin films is provided to form a CIS thin film with a uniform structure and a small thickness by easily fabricating a CIS thin film having an n-type or p-type semiconductor characteristic without varying a band gap while making In2Se3 and Cu2Se3 differ from each other in a mole fraction. First alloy including In and Se and second alloy including Cu and Se are prepared in a thermal deposition apparatus including a tungsten boat(S10). A substrate is installed in the thermal deposition apparatus(S20). The substrate is heated to a first temperature and the temperature of the substrate is maintained at the first temperature(S30). The first alloy is evaporated to form a first thin film on the substrate maintained at the first temperature(S40). The substrate is heated to a second temperature and the temperature of the substrate is maintained at the second temperature(S50). The second alloy is evaporated to form a CIS thin film on the substrate maintained at the second temperature(S60). While the substrate is cooled, the first alloy can be evaporated(S70).

Abstract translation: 提供一种用于制造p型和n型CIS（CuInSe 2）薄膜的方法，通过容易地制造具有n型或p型半导体的CIS薄膜，形成均匀结构且厚度小的CIS薄膜 使In2Se3和Cu2Se3以摩尔分数彼此不同而不改变带隙的特性。 包括In和Se的第一合金和包括Cu和Se的第二合金在包括钨舟的热沉积设备中制备（S10）。 将基板安装在热沉积设备中（S20）。 将基板加热至第一温度，将基板的温度维持在第一温度（S30）。 蒸发第一合金以在保持在第一温度的基板上形成第一薄膜（S40）。 将基板加热至第二温度，并将基板的温度维持在第二温度（S50）。 蒸发第二合金以在保持在第二温度的基板上形成CIS薄膜（S60）。 当基板冷却时，可以蒸发第一合金（S70）。

公开(公告)号：KR100819063B1

公开(公告)日：2008-04-03

申请号：KR1020070043801

申请日：2007-05-04

Applicant: 한국전자통신연구원

Inventor： 송기봉 ,  김경암 ,  이상수 ,  조두희

IPC: H01L29/786

CPC classification number: H01L27/1229 ,  H01L27/1251

Abstract: A thin film transistor and a manufacturing method thereof are provided to improve a switch characteristic for light and electricity by using an electrical thin film transistor using a polycrystal silicon layer and an optical thin film transistor using an amorphous silicon layer. An electrical thin film transistor includes a metal layer(200), a silicon layer(300a) formed on the metal layer and serving as a heat carrier layer, an insulating layer(400) formed on the silicon layer, and a polycrystal silicon layer(500a) formed on the insulating layer and serving as a channel layer. An optical thin film transistor includes a metal layer serving as a gate electrode(GE2), an insulating layer formed on the metal layer and serving as a gate insulating layer(GS2), and an amorphous silicon layer formed on the insulating layer and serving as a channel layer.

Abstract translation: 提供一种薄膜晶体管及其制造方法，通过使用使用多晶硅层的电薄膜晶体管和使用非晶硅层的光学薄膜晶体管来改善光和电的开关特性。 电薄膜晶体管包括金属层（200），形成在金属层上并用作热载体层的硅层（300a），形成在硅层上的绝缘层（400）和多晶硅层（ 500a）形成在绝缘层上并用作沟道层。 光学薄膜晶体管包括用作栅电极（GE2）的金属层，形成在金属层上并用作栅极绝缘层（GS2）的绝缘层，以及形成在绝缘层上并用作 一个通道层。

公开(公告)号：KR100809440B1

公开(公告)日：2008-03-05

申请号：KR1020070023589

申请日：2007-03-09

Applicant: 한국전자통신연구원

Inventor： 이상수 ,  송기봉 ,  서정대 ,  김경암 ,  조두희

IPC: H01L29/786

CPC classification number: H01L29/78681 ,  H01L29/24

Abstract: A thin film transistor having n-type and p-type CIS(CuInSe2) thin films and a method for manufacturing the same are provided to change a current flow between a source and a drain by electrically controlling a gate voltage. A gate electrode(110a) is formed on a partial region of a substrate(100). A dielectric(120) covers the substrate and the gate electrode. Plural CIS layers are formed on the dielectric to cover the region on which the gate electrode is formed. Source/drain regions(150a) are formed and divided, thereby including a trench for exposing parts of surfaces of the plural CIS layers. Each CIS layer has a conductive type of n-type and p-type. The CIS layer is a structure of which a p-type CIS layer is formed on an n-type CIS layer. Each CIS layer is formed by using In2Se3 and Cu2Se3. A passivation layer(160) covers the source/drain regions and the exposed CIS layer.

Abstract translation: 提供具有n型和p型CIS（CuInSe 2）薄膜的薄膜晶体管及其制造方法，以通过电控制栅极电压来改变源极和漏极之间的电流。 在基板（100）的部分区域上形成栅电极（110a）。 电介质（120）覆盖基板和栅电极。 多个CIS层形成在电介质上以覆盖形成栅电极的区域。 源极/漏极区域（150a）被形成和分割，从而包括用于暴露多个CIS层的表面的部分的沟槽。 每个CIS层具有导电类型的n型和p型。 CIS层是在n型CIS层上形成p型CIS层的结构。 每个CIS层通过使用In2Se3和Cu2Se3形成。 钝化层（160）覆盖源极/漏极区域和暴露的CIS层。

公开(公告)号：KR100859723B1

公开(公告)日：2008-09-23

申请号：KR1020070037955

申请日：2007-04-18

Applicant: 한국전자통신연구원

Inventor： 송기봉 ,  조두희 ,  김경암 ,  이상수

IPC: H01L29/786

Abstract: 본 발명의 박막 트랜지스터는 채널층을 구성하는 비정질상의 칼코게나이드층과, 비정질상의 칼코게나이드층의 양측부에 각각 형성되어 소오스 및 드레인 영역을 구성하는 결정질상의 칼코게나이드층과, 결정질상의 칼코게나이드층에 연결된 소오스 전극 및 드레인 전극과, 비정질상의 칼코게나이드층의 상부 또는 하부에 게이트 절연층을 개재하여 형성된 게이트 전극을 포함한다. 이에 따라, 본 발명은 칼코게나이드층을 광전도층으로 이용하여 광 박막 트랜지스터를 구현하거나, 비정질상의 칼코게나이드층와 결정질상의 칼코게나이드층간의 다이오드 정류 기능을 구비하는 전기 박막 트랜지스터를 구현할 수 있다.

公开(公告)号：KR1020080049474A

公开(公告)日：2008-06-04

申请号：KR1020060120079

申请日：2006-11-30

Applicant: 한국전자통신연구원

Inventor： 이상수 ,  송기봉 ,  조두희 ,  김경암

IPC: H01L31/0272 ,  H01L29/786 ,  H01L31/14 ,  H01L31/103

CPC classification number: H01L31/0272 ,  H01L29/861 ,  H01L31/103 ,  H01L31/14

Abstract: A hetero-junction diode having an n-type CIS(CuInSe2) and a p-type CuSe is provided to obtain a rectification function by using a stacked structure including a junction of the n-type CIS and the p-type CuSe. An n-type region is made of an n-type CIS. A p-type region is made of a p-type CuSe. A junction is formed between the n-type region and the p-type region. Each of the n-type region and the p-type region is made of a thin film. A cathode is electrically connected to the n-type region. An anode is electrically connected to the p-type region. A CIS layer is formed on a substrate. A CuSe layer is formed on the CIS layer. A first electrode is electrically connected to the CIS layer. A second electrode is electrically connected to the CuSe layer.

Abstract translation: 提供具有n型CIS（CuInSe 2）和p型CuSe的异质结二极管，以通过使用包括n型CIS和p型CuSe的结的堆叠结构来获得整流功能。 n型区域由n型CIS制成。 p型区域由p型CuSe制成。 在n型区域和p型区域之间形成结。 n型区域和p型区域中的每一个由薄膜制成。 阴极与n型区电连接。 阳极电连接到p型区域。 在衬底上形成CIS层。 在CIS层上形成CuSe层。 第一电极电连接到CIS层。 第二电极电连接到CuSe层。