Abstract:
본 발명에 따른 이종 네트워크 환경 내 기지국의 출력신호 송신 방법은, 기준 트래픽 로드와 현재 트래픽 로드를 비교하는 단계, 트래픽 로드 비교에 기초하여 송신 출력신호 세기를 조정하는 단계, 및 조정된 송신 출력신호 세기에 따라 송신 출력신호를 송신하는 단계를 포함한다.
Abstract:
다중 입출력 무선 통신 시스템에서의 신호 검출 방법 및 그 장치는, 복수의 송신 안테나를 통하여 전송되는 신호들을 복수의 수신 안테나를 이용하여 수신하는 다중 입출력 무선 통신 시스템에서 신호를 검출한다. 구체적으로 상기 송신 안테나와 수신 안테나 사이의 채널에 대한 특성을 나타내는 채널 행렬을 구성하는 각 요소들의 여인수 행렬식을 토대로, 상기 수신 안테나를 통하여 상기 수신 안테나들을 통하여 수신된 송신 신호들을 검출하기 위한 검출 순서를 결정한다. 그리고 결정된 검출 순서에 따라 상기 수신 안테나들을 통하여 수신된 신호들부터 송신 신호를 검출한다. 신호검출, ZF, BLAST
Abstract:
PURPOSE: A method and device for determining whether to repeat a signal demodulation procedure are provided to determine whether to repeat a signal demodulation procedure in a receiver using a CRC(Cyclic Redundacy Check) result value. CONSTITUTION: An MIMO detector(110) outputs a soft decision log-likelihood ratio value. A first adder(120) outputs a first soft decision log-likelihood ratio value. A deinterleaver(130) deinterleaves the soft decision log-likelihood ratio value. A decoder(140) simultaneously outputs a soft decision value and a hard decision value. A first CRC checking unit(150) checks FEC CRC(Forward Error Correction Cyclical Redundancy Check). A burst assembly unit(160) outputs a received signal of a burst unit. A second CRC checking unit(170) checks the successful CRC of a data burst. An interleaver(180) interleaves a third soft decision log-likelihood ratio value outputted from a second adder(125).
Abstract:
본 발명은 유한체 내에서 역원 계산 장치 및 방법에 관한 것이다. 외부로부터 입력되는 원시 원소에 대하여 유한체 지수승 블록 및 곱셈 블록으로 구성된 지수승 연산부를 이용하여 임의의 원소에 대한 역원을 계산함으로써, 하드웨어의 자원을 절약할 수 있을 뿐만 아니라, 역원을 구하는 연산 속도도 증가시킬 수 있다. 유한체, 곱셈, 역원, 표준기저
Abstract:
A RS apparatus for transmitting broadcast information received from a BS(Base Station) to a UE periodically in an MMR(Multihop Mobile Relay) system, and a transmission method therefore are provided to schedule broadcast information so as for the broadcast information to be transmitted to terminals within the RS according to the time intervals of the broadcast information transmitted by an MMR-BS, thereby using radio resources between the MMR-BS and a RS efficiently. A RS(Relay Station) apparatus(200) comprises a receiving unit(201), a scheduling unit(202), and a transmitting unit(203). The receiving unit receives a message including broadcast information to be transmitted to a UE(User Equipment), and stores/updates the broadcast information in the received message. The scheduling unit determines broadcast information to be included into a downlink frame on the basis of predetermined time intervals for the each broadcast information in the stored or updated broadcast information. The transmitting unit transmits the determined broadcast information to the UE within the RS using the downlink frame.
Abstract:
A device and a method for FFT(Fast Fourier Transform) are provided to offer a simple binary reverse output order, reduce complexity, and minimize the number of hardware elements by using a structure formed with only the adders without any multiplier, as a mixed radix 4-2 butterfly structure is used. The first butterfly operation module(130) generates four first output data by performing a radix-4 butterfly operation from input data and data received from the first feedback memory(120). The first multiplexer(140) outputs the data from the first feedback memory or the first output data to the first output port. The second multiplexer(150) stores the input data or the data excluding the data output from the first multiplexer among the first output data. A controller(190) makes the first and second multiplexer provide the first output data to the first output part according to the simple binary reverse output order.
Abstract:
PURPOSE: A duplex board system and a method for switching duplex boards thereof are provided to instantly switch an active state board to a standby state board when abnormality is generated in the active state board in hardware, and switch the active state board and the standby state board in software. CONSTITUTION: The second duplex board(20) connects with the first duplex board(10) through communication channels(42,43). A cell bus(30) having a multicasting function is a communication bus between the first or second duplex board(10,20) and another board. The first and second duplex boards(10,20) generate signals for switching active and standby states by a state value decided by their hardware abnormal state and state control signals capable of being controlled in software, and a state value of an object board.
Abstract:
PURPOSE: A controller for duplexing ethernet channel duplexing in duplex ethernet switch is provided to construct a further rapid and reliable duplexed system by a physical connection and disconnection of the Ethernet channel. CONSTITUTION: A controller for duplexing ethernet channel duplexing in duplex ethernet switch includes a first Ethernet switch board(A) and a second Ethernet switch board(B). The first Ethernet switch board(A) includes M numbers of media access control(MAC) engines for generating the Ethernet switch control state signals, an Ethernet switch controller(10A), M numbers of transformers(40A,41A,42A) connected to the M numbers of Ethernet ports, M numbers of analog switches(30A,31A,32A) connected between the M numbers of transformers(40A,41A,42A) and the physical devices(20A,21A,22A) and a first duplexed controller(50A). And, the second Ethernet switch board(B) is composed of the same structure and function of the first Ethernet switch board(A). The first duplexed controller(50A) and the second duplexed controller(50B) of the second Ethernet switch board(B) detect their operational status by the Ethernet switch control state signal and the process state signals of the CPU. And, the first duplexed controller(50A) and the second duplexed controller(50B) control the switch operations of the analog switches in response to their status.
Abstract:
PURPOSE: A device for realizing dual Ethernet channels by using a single MAC engine is provided to independently operate two Ethernet channels by selectively controlling two switches as sharing an MAC engine, a physical device, and a control program, thereby reducing hardware and software consumption. CONSTITUTION: An MAC engine(10) analyzes a header of a signal, and determines a transmission path. A physical device(20) converts inputted data through a physical conversion of the data. The first and second analog switches(31,32) are commonly connected to a transceiving terminal of the physical device(20). The first and second transformers(51,52) are connected to the first and second analog switches(31,32) and the first and second Ethernet ports(P1,P2), respectively. A switch selector(40) drives the first and second analog switches(31,32). A CPU(60) controls an operation of the switch selector(40).