公开(公告)号：KR1020000000770A

公开(公告)日：2000-01-15

申请号：KR1019980020592

申请日：1998-06-03

Applicant: 한국전자통신연구원

Inventor： 서정욱 ,  한경남 ,  이광현 ,  윤의식 ,  김경수

IPC: G06F7/44

Abstract: PURPOSE: A device for multiplying a modular is provided to reduce the number of clocks and to reduce a clock cycle by a Redundant Binary(RB) arithmetic for minimizing a period for a whole Rivest Shamir Adleman coding. CONSTITUTION: A device for multiplying a modular comprises: an array storing equipment(51) storing an inner value of a modular multiplication; a multiplier register(52) storing a multiplier value of the array storing equipment; a multiplicand/modular value register storing a multiplicand value or a modular value of the array storing equipment; a reverse calculator figuring a reverse number from the array storing equipment; and a pipeline circulator circulating an output of a pipeline multiplier.

Abstract translation: 目的：提供一种用于乘法模块的设备，以减少时钟数量，并通过冗余二进制（RB）算法减少时钟周期，以最大限度地减少整个Rivest Shamir Adleman编码的周期。 构成：用于对模块进行乘法的装置包括：阵列存储设备（51），存储模乘法的内值; 存储阵列存储设备的乘数值的乘法器寄存器（52） 存储阵列存储设备的被乘数值或模数值的乘法/模数值寄存器; 反向计算器从阵列存储设备中确定反向数字; 以及循环管道乘法器的输出的流水线循环器。