Abstract:
PURPOSE: An apparatus and a method for encoding a high speed quasi-cyclic low density parity check(QC-LDPC) code with low complexity are provided to obtain linear complexity by performing an encoding operation directly using a parity check matrix. CONSTITUTION: A parity bit generating unit(440) is generates a parity bit. A temporary parity bit generating unit(410) generates input information with circulants. A temporary bit generating unit corresponds each circulant to each line using the parity bit. A correction bit generating unit(420) corrected parity bit using the output of the temporary parity bit generating unit. A parity bit correcting unit(430) corrects the parity bit by reflecting the output of the correction bit generating unit to the temporary parity bit generating unit.
Abstract:
1. 청구범위에 기재된 발명이 속한 기술분야 본 발명은, 시드 단백질 기반 단백질 상호작용 네트워크의 시각화 방법에 관한 것임. 2. 발명이 해결하려고 하는 기술적 과제 본 발명은, 물리적인 관계도가 높은 노드를 중심으로 다단계에 걸쳐 합병을 수행하고 최종 합병 그래프에 대해 다단계에 걸쳐 확장 및 FDP(Force-Directed Placement)를 수행함으로써, 방대한 단백질 상호작용 네트워크를 균형 상태의 그래프로 표현하고 고속으로 시각화하기 위한, 시드 단백질 기반 단백질 상호작용 네트워크의 시각화 방법을 제공하는데 그 목적이 있음. 3. 발명의 해결방법의 요지 본 발명은, 단백질 상호작용 네트워크를 이루는 각 서브 그래프의 노드 리스트를 추출하여 노드 인접 정도에 따라 정렬하는 노드 리스트 정렬 단계; 상기 정렬한 노드 리스트 중에서 노드 우선순위와 타 노드와의 합병 관계에 따라 시드 단백질(Seed Protein)을 선정하는 시드 단백질 선정 단계; 상기 선정한 시드 단백질을 중심으로 인접 노드들을 합병하여 합병 노드를 생성하는 합병 노드 생성 단계; 및 상기 생성한 합병 노드의 초기 위치를 선정하고 해당 시드 단백질을 중심으로 분할포인트 상에 합병된 노드를 위치시킨 후 시각화하는 시각화 단계를 포함함. 4. 발명의 중요한 용도 본 발명은 단백질 상호작용 네트워크의 시각화 등에 이용됨. 바이오인포매틱스, 단백질 상호작용 네트워크, FDP 알고리즘, 인접 노드, 분할포인트, 시각화
Abstract:
A method for visualizing a protein interworking network around seed protein is provided to express the huge protein interworking network with a stable graph and visualize the protein interworking network at high speed by performing mergence centering on a highly physically related node over a plurality of stages, and performing expansion and FDP(Force-Directed Placement) to the final mergence graph. A node list of each sub-graph forming an protein interaction network is extracted and is arranged according to a node adjacency level(220). Seed protein is selected among the arranged node list according to node priority and mergence relation with other nodes(230). A merged node is generated by merging the adjacent nodes around the selected seed protein(240). An initial position of the merged node is selected and the merged node is located on a division point around the seed protein(260).
Abstract:
The present invention relates to a map decoder having low latency and an operation method thereof, the device comprising a branch metric calculation block for calculating a branch metric based on a reception signal; a processor control block for de-multiplexing the reception signal of a trellis section, an Extrinsec vector, and the calculated branch metric value; and a processor for calculating a path metric entering into each state node of the specific trellis section, for compensating for the calculated path metric, and for calculating the state metric reflected to the next trellis section using the compensated path metric.
Abstract:
PURPOSE: An iterative detection and decoding method and an apparatus thereof are provided to reduce a required operation amount for detecting a reception signal and to reduce an output latency time. CONSTITUTION: An update control unit(110) determines a predetermined group to be updated in a first soft decision sequence and transmits detection control information in a determined group. A detecting unit(120) performs an independent detection operation about each extracted reception signal group. A deinterleaver(130) performs deinterleaving about a second soft decision sequence. A decoding unit(140) generates a third soft decision sequence by decoding using a predetermined decoding algorithm in the second soft decision sequence which performs deinterleaving. A repetition control unit(150) controls whether detection and decoding are repetitive by determining whether the number of iterative detections satisfies the predetermined number. An interleaver(160) performs interleaving for the third soft decision sequence. A hard decision unit(170) calculates a hard decision value about a final soft decision sequence transmitted from the repetition control unit. [Reference numerals] (110) Update control unit; (111) Dividing unit; (113) Determining unit; (115) Transmitting unit; (120) Detecting unit; (121) Reception signal extracting unit; (123) Partial update unit; (124) Soft determination value calculation unit; (125) Update unit; (130) Deinterleaver; (140) Decoding unit; (150) Repetition control unit; (160) Interleaver; (170) Hard decision unit; (AA) Reception signal
Abstract:
PURPOSE: A communication device for a continuous phase modulated signal is provided to supply a strong continuous phase modulated signal by removing influence due to serious channel errors. CONSTITUTION: A first processing unit(101) generates the first information of a continuous phase modulated signal by using first symbol data. A symbol conversion unit(102) changes the first symbol data into second symbol data. A symbol storage(103) stores the second symbol data. A second processing unit(104) generates the second information of the continuous phase modulated signal by using the second symbol data stored in the symbol storage. A third processing unit(105) generates the third information of the continuous phase modulated signal by using modular arithmetic of a fixed number related to a modulation index. An output unit(106) generates the continuous phase modulated signal by adding up an output of the third processing unit and the output of the first processing unit.