公开(公告)号：AU2003275208A1

公开(公告)日：2004-04-19

申请号：AU2003275208

申请日：2003-09-24

Applicant: 3M INNOVATIVE PROPERTIES CO

Inventor： SATOU SADANOBU ,  KIMURA TERUHIKO ,  GORRELL ROBIN E ,  SYLVESTER MARK F ,  BANKS DONALD R ,  HOLCOMB MICHAEL D ,  BALLARD WILLIAM V ,  HIROSAWA KOUICHI

IPC: H01L23/498

Abstract: A laminated flip-chip interconnect package comprising a substrate having a chip attach surface and a board attach surface that define contact pads for attachment to corresponding pads on the chip and board wherein the substrate board surface comprises at least one solid plane covering the chip attach surface region near at least one chip corner. In one embodiment, the solid plane comprises a dielectric material, optionally covered with a soldermask or coverlay material. In an alternate embodiment, the solid plane comprises a metal, optionally covered with a soldermask or coverlay material.

公开(公告)号：AU2003294307A1

公开(公告)日：2004-06-18

申请号：AU2003294307

申请日：2003-11-18

Applicant: 3M INNOVATIVE PROPERTIES CO

Inventor： HOLCOMB MICHAEL D ,  BALLARD WILLIAM V ,  SYLVESTER MARK F ,  SCHILDGEN WILLIAM R ,  GORRELL ROBIN E

IPC: H01L23/498 ,  H05K1/02 ,  H05K3/46

Abstract: An interconnect module providing conductive interconnection paths between an integrated chip, a printed wiring board, and at least one layer within the module, incorporating a plurality of alternating dielectric and conductive layers laminated together to form a unitary structure. The module includes a chip attach surface and a board attach surface, that define contact pads for attachment to corresponding pads on the chip and printed wiring board, respectively, by means of solder balls.

公开(公告)号：AU2003275208A8

公开(公告)日：2004-04-19

申请号：AU2003275208

申请日：2003-09-24

Applicant: 3M INNOVATIVE PROPERTIES CO

Inventor： GORRELL ROBIN E ,  KIMURA TERUHIKO ,  BANKS DONALD R ,  BALLARD WILLIAM V ,  SYLVESTER MARK F ,  SATOU SADANOBU ,  HIROSAWA KOUICHI ,  HOLCOMB MICHAEL D

IPC: H01L23/498

Abstract: A laminated flip-chip interconnect package comprising a substrate having a chip attach surface and a board attach surface that define contact pads for attachment to corresponding pads on the chip and board wherein the substrate board surface comprises at least one solid plane covering the chip attach surface region near at least one chip corner. In one embodiment, the solid plane comprises a dielectric material, optionally covered with a soldermask or coverlay material. In an alternate embodiment, the solid plane comprises a metal, optionally covered with a soldermask or coverlay material.

公开(公告)号：WO2004030096A3

公开(公告)日：2004-06-17

申请号：PCT/US0330060

申请日：2003-09-24

Applicant: 3M INNOVATIVE PROPERTIES CO ,  NEC ELECTRONICS CORP

Inventor： GORRELL ROBIN E ,  SYLVESTER MARK F ,  BANKS DONALD R ,  HOLCOMB MICHAEL D ,  BALLARD WILLIAM V ,  HIROSAWA KOUICHI ,  SATOU SADANOBU ,  KIMURA TERUHIKO

IPC: H01L23/498

CPC classification number: H01L23/49822 ,  H01L23/49816 ,  H01L23/49894 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/01019 ,  H01L2924/01057 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/3511

Abstract: A laminated flip-chip interconnect package comprising a substrate having a chip attach surface and a board attach surface that define contact pads for attachment to corresponding pads on the chip and board wherein the substrate board surface comprises at least one solid plane covering the chip attach surface region near at least one chip corner. In one embodiment, the solid plane comprises a dielectric material, optionally covered with a soldermask or coverlay material. In an alternate embodiment, the solid plane comprises a metal, optionally covered with a soldermask or coverlay material.

Abstract translation: 一种叠层倒装芯片互连封装，包括具有芯片附着表面和板附着表面的衬底，所述衬底附着表面限定用于附着到所述芯片和板上的相应焊盘的接触焊盘，其中所述衬底板表面包括覆盖所述芯片附着表面的至少一个实体平面 区域靠近至少一个芯片角落。 在一个实施例中，固体平面包括电介质材料，可选地用焊料掩模或覆盖层材料覆盖。 在替代实施例中，固体平面包括金属，可选地用焊料掩模或覆盖层材料覆盖。