INSULATED GATE POWER SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SUCH A DEVICE

    公开(公告)号:US20190123172A1

    公开(公告)日:2019-04-25

    申请号:US16157435

    申请日:2018-10-11

    Applicant: ABB Schweiz AG

    Abstract: An insulated gate power semiconductor device includes an (n−) doped drift layer between an emitter side and a collector side. A p doped protection pillow covers a trench bottom of a trench gate electrode. An n doped enhancement layer having a maximum enhancement layer doping concentration in an enhancement layer depth separates the base layer from the drift layer. An n doped plasma enhancement layer having a maximum plasma enhancement layer doping concentration covers an edge region between the protection pillow and the trench gate electrode. The n doping concentration decreases from the maximum enhancement layer doping concentration towards the plasma enhancement layer and the n doping concentration decreases from the maximum plasma enhancement layer doping concentration towards the enhancement layer such that the n doping concentration has a local doping concentration minimum between the enhancement layer and the plasma enhancement layer.

    Insulated gate power semiconductor device and method for manufacturing such a device

    公开(公告)号:US10128361B2

    公开(公告)日:2018-11-13

    申请号:US15661631

    申请日:2017-07-27

    Applicant: ABB Schweiz AG

    Abstract: An insulated gate power semiconductor device has an (n−) doped drift layer between an emitter side and a collector side. A trench gate electrode has a trench bottom and trench lateral sides and extends to a trench depth. A p doped first protection pillow covers the trench bottom. An n doped second protection pillow encircles the trench gate electrode at its trench lateral sides. The second protection pillow has a maximum doping concentration in a first depth, which is at least half the trench depth, wherein a doping concentration of the second protection pillow decreases towards the emitter side from the maximum doping concentration to a value of not more than half the maximum doping concentration. An n doped enhancement layer has a maximum doping concentration in a second depth, which is lower than the first depth, wherein the doping concentration has a local doping concentration minimum between the second depth and the first depth.

    INSULATED GATE POWER SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SUCH A DEVICE

    公开(公告)号:US20170323959A1

    公开(公告)日:2017-11-09

    申请号:US15661631

    申请日:2017-07-27

    Applicant: ABB Schweiz AG

    Abstract: An insulated gate power semiconductor device has an (n−) doped drift layer between an emitter side and a collector side. A trench gate electrode has a trench bottom and trench lateral sides and extends to a trench depth. A p doped first protection pillow covers the trench bottom. An n doped second protection pillow encircles the trench gate electrode at its trench lateral sides. The second protection pillow has a maximum doping concentration in a first depth, which is at least half the trench depth, wherein a doping concentration of the second protection pillow decreases towards the emitter side from the maximum doping concentration to a value of not more than half the maximum doping concentration. An n doped enhancement layer has a maximum doping concentration in a second depth, which is lower than the first depth, wherein the doping concentration has a local doping concentration minimum between the second depth and the first depth.

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