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    ENHANCED TURBO PRODUCT CODES
    2.
    发明申请
    ENHANCED TURBO PRODUCT CODES 审中-公开
    增强涡轮产品代码

    公开(公告)号：WO0169797A3

    公开(公告)日：2002-02-28

    申请号：PCT/US0108101

    申请日：2001-03-14

    Applicant: ADVANCED HARDWARE ARCHITECTURE

    Inventor： HEWITT ERIC JOHN ,  LINDSTROM BRADLEY WILLIAM ,  LADOW PETER SEAN ,  DANIELSON ALAN ROBERT

    IPC: G06F11/10 ,  H03M13/29

    CPC classification number: H03M13/2963 ,  H03M13/2903 ,  H03M13/2909 ,  H03M13/2918 ,  H03M13/2921

    Abstract: A hyper encoder module encodes a block of data having a plurality of sub-blocks. Each sub-block includes a plurality of systematic block code codewords. A parity sub-block is added to the block. The parity sub-block is a first sub-block rotated by a predetermined number of bits. Each subsequent sub-block in the n-dimensional block is rotated by an appropriate number of bits and bit-wise XORed. An encoder method and apparatus which includes the hyper encoder module receives the block of data. A row of the block is immediately output and encoded by a first module according to a first encoding scheme. A column is encoded by a second module according to a second encoding scheme. A second set of encoded data is generated, iteratively updated and output by the second module. The hyper encoder module hyper-diagonally encodes the information bits as described above and then output.

    Abstract translation: 超编码器模块对具有多个子块的数据块进行编码。 每个子块包括多个系统块码码字。 奇偶校验子块被添加到块中。 奇偶校验子块是以预定位数旋转的第一子块。 n维块中的每个后续子块被旋转适当数量的位并且进行逐位异或。 包括超编码器模块的编码器方法和装置接收数据块。 根据第一编码方案，块的一行立即由第一模块输出和编码。 根据第二编码方案，列由第二模块编码。 生成第二组编码数据，迭代地更新并由第二模块输出。 超编码器模块如上所述对信息位进行超对角编码，然后输出。

    ENHANCED TURBO PRODUCT CODES
    4.
    发明专利
    ENHANCED TURBO PRODUCT CODES 未知

    公开(公告)号：CA2402257C

    公开(公告)日：2010-04-13

    申请号：CA2402257

    申请日：2001-03-14

    Applicant: ADVANCED HARDWARE ARCHITECTURE

    Inventor： HEWITT ERIC JOHN ,  LINDSTROM BRADLEY WILLIAM ,  LADOW PETER SEAN ,  DANIELSON ALAN ROBERT

    IPC: G06F11/10 ,  H03M13/29

    Abstract: A hyper encoder module encodes a block of data having a plurality of sub-blocks. Each sub-block includes a plurality of systematic block code codewords. A parity sub-block is added to the block. The parity sub-block is a first sub-block rotated by a predetermined number of bits. Each subsequent sub-block in the n-dimensional block is rotated by an appropriate number of bits and bit-wise XORed. An encoder method and apparatus which includes the hyper encoder module receives the block of data. A row of the block is immediately output and encoded by a first module according to a first encoding scheme. A column is encoded by a second module according to a second encoding scheme. A second set of encoded data is generated, iteratively updated and output by the second module. The hyper encoder module hyper-diagonally encodes the information bits as described above and then output.

    Enhanced turbo product code decoder system
    5.
    发明专利
    Enhanced turbo product code decoder system 未知

    公开(公告)号：AU8929601A

    公开(公告)日：2001-10-15

    申请号：AU8929601

    申请日：2001-04-04

    Applicant: ADVANCED HARDWARE ARCHITECTURE

    Inventor： HEWITT ERIC JOHN ,  DANIELSON ALAN ROBERT ,  LADOW PETER SEAN ,  HANSEN TOM LEROY ,  OWSLEY PATRICK ALAN

    IPC: G06F11/10 ,  H03M13/25 ,  H03M13/27 ,  H03M13/29 ,  H03M13/45 ,  H04L1/00

    Abstract: A method and apparatus for decoding a linear block encoded string of information bits comprising: converting the string into a plurality of codewords. Performing hard and soft decisions on each codeword to generate a hard and soft decision vector. Computing the syndrome and finding the location of the two minimum values by Galois Field Arithmetic. Designating these values LOW1 and LOW2 and xoring with a Nc1, thus generating Nc2. Swapping Nc1 with Nc2 and determining the lowest soft decision value, Min1 and a next lowest value, Min2. The two bit locations creating Min1 are designated as MinA and MinB. MinA being replaced with Min2 minus the value MinA. MinB being replaced with Min2 minus the value at MinB. Generating an output codeword by subtracting Min1 from all other bit locations values and 2's complementing all soft values with 0 in their location. Creating the new soft value vector.

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