公开(公告)号：WO1997029417A1

公开(公告)日：1997-08-14

申请号：PCT/US1996017243

申请日：1996-10-29

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  RUNALDUE, Thomas, A. ,  CHENG, Yi

IPC: G06F01/02

CPC classification number: H04L25/03834 ,  G06F1/022

Abstract: A system for synthesizing a waveform that employs combinatorial logic to generate digital data for each of a set of preselected waveforms. The system includes circuitry for selecting a sequence of the preselected waveform pulses in response to a data signal and circuitry for converting the digital data for the sequence of the preselected waveform pulses into the waveform.

Abstract translation: 一种用于合成采用组合逻辑以生成一组预选波形中的每一个的数字数据的波形的系统。 该系统包括用于响应于数据信号选择预选波形脉冲序列的电路和用于将预选波形脉冲序列的数字数据转换为波形的电路。

公开(公告)号：WO1998020654A1

公开(公告)日：1998-05-14

申请号：PCT/US1997010864

申请日：1997-07-02

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  CHENG, Yi

IPC: H04L25/02

CPC classification number: H04L25/03885

Abstract: A digitally-controlled transmission line equalizer is provided for receiving distorted MLT-3 distorted signals transmitted through a transmission line and for adaptively compensating for the signal distortion. The digitally-controlled equalizer is formed of a peak detection circuit (24), an algorithmic A/D converter (26), an equalizer circuit (28), a first comparator (30), a second comparator (32), and an OR logic gate (34). The digitally-controlled equalizer is of a relatively simple construction and has a high speed of operation.

Abstract translation: 提供数字控制的传输线均衡器用于接收通过传输线传输的失真的MLT-3失真信号，并自适应地补偿信号失真。 数字控制均衡器由峰值检测电路（24），算法A / D转换器（26），均衡器电路（28），第一比较器（30），第二比较器（32）和OR 逻辑门（34）。 数字控制均衡器结构相对简单，运行速度快。

公开(公告)号：WO1997029575A1

公开(公告)日：1997-08-14

申请号：PCT/US1996017495

申请日：1996-10-29

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  CHENG, Yi

IPC: H04L25/02

CPC classification number: H04L25/028 ,  H04L25/0274 ,  H04L25/0282 ,  H04L25/03834

Abstract: A differential current amplifier operating at a low power while maintaining high linearity includes a bridge arrangement of current mirrors connected to each input node of the amplifier, and a common mode feedback circuit. Opposite legs of the bridge are controlled commonly, but complementary to the other legs. An integrated resistor network of the current amplifier balances delay of the output current and controls amplifier bandwidth.

Abstract translation: 在保持高线性度的同时以低功率工作的差分电流放大器包括连接到放大器的每个输入节点的电流镜的桥接布置和共模反馈电路。 桥梁的相对的双腿通常受到控制，但与其他腿部互补。 电流放大器的集成电阻网络平衡输出电流的延迟并控制放大器带宽。

公开(公告)号：WO1998010527A1

公开(公告)日：1998-03-12

申请号：PCT/US1997006092

申请日：1997-04-11

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  CHENG, Yi

IPC: H04B03/14

CPC classification number: H03H11/0422 ,  H04B3/144

Abstract: A CMOS transmission line equalizer is provided for receiving distorted signals transmitted through a transmission line and for compensating for the signal distortion. The equalizer has a transfer function characteristic with a single pole and a single zero. The transfer function includes a mirroring ratio circuit (CMR) for controlling the ratio between the single pole and the single zero. The mirroring ratio circuit is controlled by transistor size ratio. The single zero serves to cancel the dominant pole in the transfer function of the transmission line so as to compensate for the signal distortion caused by the transmission line.

Abstract translation: 提供CMOS传输线均衡器用于接收通过传输线传输的失真信号并补偿信号失真。 均衡器具有单极和单个零的传递函数特性。 传递函数包括用于控制单极和单个零之间的比率的镜像比电路（CMR）。 镜像比电路由晶体管尺寸比控制。 单个零用于消除传输线的传递函数中的主极，以补偿由传输线引起的信号失真。

公开(公告)号：WO1997029547A1

公开(公告)日：1997-08-14

申请号：PCT/US1996017157

申请日：1996-10-25

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  CHENG, Yi ,  RUNALDUE, Thomas, J.

IPC: H03M01/66

CPC classification number: H03M1/662 ,  H03M1/745 ,  H03M1/747

Abstract: A digital to analog converter that includes circuitry that converts sequences of positive and negative digital data samples into electrical currents and current mirror circuitry that generates an analog waveform by combining and amplifying the electrical currents.

Abstract translation: 数模转换器包括将正和负数字数据样本的序列转换为电流的电路和电流镜电路，其通过组合和放大电流来产生模拟波形。

公开(公告)号：WO1998057438A1

公开(公告)日：1998-12-17

申请号：PCT/US1997023695

申请日：1997-12-18

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  CHENG, Yi ,  LIU, Zhenhua ,  RUNALDUE, Thomas, Jefferson

IPC: H04B03/14

CPC classification number: G01B7/02 ,  H03M1/367

Abstract: A cable length estimation circuit (110) for receiving an input MLT-3 signal provided through an arbitrary length cable (104) and providing a control signal to an equalizer (108) indicating the estimated length of the cable enabling the equalizer (108) to compensate for distortion of the MLT-3 signal resulting from the cable. The cable length estimation circuit (110) includes an edge rate detection circuit (400) for measuring the rate of change in voltage with respect to time during transitions of the MLT-3 signal to provide an indication of cable length. The cable length estimation circuit (110) can also include a digital averaging circuit (402) which provides an average value for signals from the edge rate detection circuit for a desired number of transitions of the MLT-3 signal. The cable length estimation (110) can also include a baseline wander detection circuit (404) which functions so that previous cable length estimations are provided when baseline wander is detected.

Abstract translation: 一种用于接收通过任意长度电缆（104）提供的输入MLT-3信号并向均衡器（108）提供控制信号的电缆长度估计电路（110），所述均衡器指示所述电缆的估计长度，使所述均衡器（108） 补偿由电缆产生的MLT-3信号的失真。 电缆长度估计电路（110）包括边缘速率检测电路（400），用于在MLT-3信号转变期间测量电压相对于时间的变化率，以提供电缆长度的指示。 电缆长度估计电路（110）还可以包括数字平均电路（402），该数字平均电路（402）为来自边缘速率检测电路的信号提供MLT-3信号的期望数量的转换的平均值。 电缆长度估计（110）还可以包括基线漂移检测电路（404），其用于在检测到基线漂移时提供先前的电缆长度估计。

公开(公告)号：WO1997029418A1

公开(公告)日：1997-08-14

申请号：PCT/US1996017305

申请日：1996-10-29

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  RUNALDUE, Thomas, J. ,  CHENG, Yi

IPC: G06F01/02

CPC classification number: H04L25/03834 ,  G06F1/02 ,  G06F1/022 ,  G06F1/0321

Abstract: A system for synthesizing a waveform includes waveform synthesis circuitry that generates digital data for each of a set of waveform pulses having preselected slopes at zero-crossing. A sequencer tracks the history of information contained in a data signal and selects a sequence of the waveform pulses in response to the history such that the sequence conveys the history of information while minimizing mismatches between the slopes of adjacent waveform pulses in the sequence.

Abstract translation: 一种用于合成波形的系统包括：波形合成电路，其生成具有在零交叉处具有预选斜率的一组波形脉冲中的每一个的数字数据。 定序器跟踪包含在数据信号中的信息的历史，并响应于历史选择一个波形脉冲序列，使得序列传送信息历史，同时使序列中相邻波形脉冲的斜率最小化。

公开(公告)号：EP0864208B1

公开(公告)日：2001-02-14

申请号：EP97924498.5

申请日：1997-04-11

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： CHENG, Yi

IPC: H04B3/14 ,  H03H11/04

CPC classification number: H03H11/0422 ,  H04B3/144

公开(公告)号：EP0883840B1

公开(公告)日：2001-07-18

申请号：EP96937033.7

申请日：1996-10-29

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： RUNALDUE, Thomas, A. ,  CHENG, Yi

IPC: G06F1/02

CPC classification number: H04L25/03834 ,  G06F1/022

Abstract: A system for synthesizing a waveform that employs combinatorial logic to generate digital data for each of a set of preselected waveforms. The system includes circuitry for selecting a sequence of the preselected waveform pulses in response to a data signal and circuitry for converting the digital data for the sequence of the preselected waveform pulses into the waveform.

公开(公告)号：EP0883841B1

公开(公告)日：2000-06-07

申请号：EP96937054.3

申请日：1996-10-29

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： RUNALDUE, Thomas, J. ,  CHENG, Yi

IPC: G06F1/02 ,  G06F1/03

CPC classification number: H04L25/03834 ,  G06F1/02 ,  G06F1/022 ,  G06F1/0321

Abstract: A system for synthesizing a waveform includes waveform synthesis circuitry that generates digital data for each of a set of waveform pulses having preselected slopes at zero-crossing. A sequencer tracks the history of information contained in a data signal and selects a sequence of the waveform pulses in response to the history such that the sequence conveys the history of information while minimizing mismatches between the slopes of adjacent waveform pulses in the sequence.