公开(公告)号：WO1996042139A1

公开(公告)日：1996-12-27

申请号：PCT/US1996010297

申请日：1996-06-13

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  HAWKINS, Keith, G. ,  JAVALAGI, Shivachandra, I. ,  NAIR, Harikumar, B. ,  LING, Kuok, Y. ,  CRAYCRAFT, Donald, G.

IPC: H03K19/003

CPC classification number: H03K19/00315 ,  H03K19/018521 ,  H03K19/018592

Abstract: An output driver circuit and an input receiver circuit are provided. The output driver circuit employs a series-connected pair of PMOS transistors (102) and coupled to a series-connected pair of NMOS transistors (106, 108). One of the PMOS transistors (102) and one of the NMOS transistors (106) have their gate terminals connected to a pair of power sources (Vref, VCC) such that these transistors maintain a voltage level on the node connecting the transistor to its corresponding pair. The voltage level is maintained during times when the pair of transistors are not conducting current. By maintaining this voltage, the voltage difference between any two terminals of the transistors is held within the maximum allowable voltage of the semiconductor technology. An input receiver circuit is also described which contains an NMOS transistor (120) between the input conductor and receiving inverter circuits. This NMOS transistor (120) has its gate terminal connected to a power supply (VCC) conveying the same voltage as the power supply for the integrated circuit core. The NMOS transistor (120) limits the voltage at the input of the receiving inverter circuits to no more than the power supply voltage (VCC). The circuits may be combined to form an input/output driver circuit.

Abstract translation: 提供输出驱动电路和输入接收电路。 输出驱动器电路采用串联连接的PMOS晶体管（102）并耦合到串联连接的一对NMOS晶体管（106,108）。 一个PMOS晶体管（102）和一个NMOS晶体管（106）的栅极端子连接到一对电源（Vref，VCC），使得这些晶体管在将晶体管连接到其对应的节点上保持电压电平 对。 在该对晶体管不导通电流的时间期间维持电压电平。 通过保持该电压，晶体管的任何两个端子之间的电压差保持在半导体技术的最大允许电压范围内。 还描述了一种在输入导体和接收反相器电路之间包含NMOS晶体管（120）的输入接收器电路。 该NMOS晶体管（120）的栅极端子连接到输送与用于集成电路核心的电源相同的电压的电源（VCC）。 NMOS晶体管（120）将接收逆变器电路的输入端的电压限制为不超过电源电压（VCC）。 电路可以组合以形成输入/输出驱动器电路。

公开(公告)号：WO1997021273A1

公开(公告)日：1997-06-12

申请号：PCT/US1996011859

申请日：1996-07-17

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  HAWKINS, Keith, G. ,  NAIR, Harikumar, B. ,  JAVALAGI, Shivachandra, I. ,  LING, Kuok, Y.

IPC: H03K19/003

CPC classification number: H03K19/018585 ,  H03K3/356182 ,  H03K19/00315 ,  H03K19/018592

Abstract: An integrated circuit is presented having a driver circuit programmable to produce a variety of output voltages and conductive to the voltage levels of circuits interfaced by the integrated circuit. The integrated circuit includes programmable pull up and pull down functions. The integrated circuit may be configured into an application having devices powered by a power supply voltage which is substantially larger than the voltage supplying the core section of the integrated circuit. Additionally, the present integrated circuit may be configured into other applications having devices powered by a power supply voltage substantially similar to the voltage supplying the integrated circuit core section. The present integrated circuit therefore retains utility for a large variety of applications. The pull up and pull down transistors may be programmed to provide a resistive one, resistive zero, or neither.

Abstract translation: 提出了一种集成电路，其具有可编程的驱动器电路，以产生各种输出电压并且与由集成电路接口的电路的电压电平导通。 集成电路包括可编程上拉和下拉功能。 集成电路可以被配置为具有由比该集成电路的芯部提供的电压大得多的电源电压供电的装置的应用。 此外，本集成电路可以被配置成具有由基本上类似于提供集成电路核心部分的电压的电源电压供电的装置的其他应用。 因此，本集成电路可以用于各种各样的应用。 上拉和下拉晶体管可以被编程为提供电阻一个，电阻零或两者。

公开(公告)号：WO1997021222A1

公开(公告)日：1997-06-12

申请号：PCT/US1996011790

申请日：1996-07-17

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  HAWKINS, Keith, G. ,  NAIR, Harikumar, B. ,  JAVALAGI, Shivachandra, I.

IPC: G11C07/00

CPC classification number: G11C7/1048 ,  G01R31/3185

Abstract: An integrated circuit incorporating programmable pullup and pulldown devices into each input/output (I/O) pad is described. Each I/O pad may be individually programmed to include a pullup or pulldown function. Pullpup and pulldown resistors may be removed from a system employing the present integrated circuit. Programming of the I/O pads may be accomplished in a number of ways. Following the deassertion of a reset signal, high impedance states may be transferred into a shift data storage within the integrated circuit. Once the states are received, they are shifted to the respective I/O pads through a serial chain connection of the pullup and pulldown devices within each I/O pad. The states are then maintained by each pullup and pulldown device until a subsequent reprogramming. Software programs may also reprogram the pullup and pulldown states by storing appropriate values into the shift data storage. The program then sets an appropriate value into a status register included within the integrated circuit. Upon detection of the value within the status register, the integrated circuit reprograms the high impedance states of the I/O pads with the states stored in the shift data storage.

Abstract translation: 描述了将可编程上拉和下拉器件集成到每个输入/输出（I / O）焊盘中的集成电路。 每个I / O焊盘可以被单独编程以包括上拉或下拉功能。 可以从采用本集成电路的系统中去除Pullpup和下拉电阻。 I / O焊盘的编程可以以多种方式实现。 在取消复位信号之后，高阻抗状态可以传送到集成电路内的移位数据存储器中。 一旦接收到状态，它们将通过每个I / O焊盘中的上拉和下拉器件的串行链路连接移至相应的I / O焊盘。 然后通过每个上拉和下拉装置维持状态，直到随后的重新编程。 软件程序还可以通过将适当的值存储到移位数据存储器中来重新编程上拉和下拉状态。 然后程序将一个适当的值设置到集成电路中包含的状态寄存器中。 在检测到状态寄存器中的值之后，集成电路利用存储在移位数据存储器中的状态来重新编程I / O焊盘的高阻抗状态。

公开(公告)号：EP0864153B1

公开(公告)日：2000-05-10

申请号：EP96927234.3

申请日：1996-07-17

Applicant: Advanced Micro Devices, Inc.

Inventor： HAWKINS, Keith, G. ,  NAIR, Harikumar, B. ,  JAVALAGI, Shivachandra, I.

IPC: G11C7/00 ,  G01R31/3185

CPC classification number: G11C7/1048 ,  G01R31/3185

Abstract: An integrated circuit incorporating programmable pullup and pulldown devices into each input/output (I/O) pad is described. Each I/O pad may be individually programmed to include a pullup or pulldown function. Pullpup and pulldown resistors may be removed from a system employing the present integrated circuit. Programming of the I/O pads may be accomplished in a number of ways. Following the deassertion of a reset signal, high impedance states may be transferred into a shift data storage within the integrated circuit. Once the states are received, they are shifted to the respective I/O pads through a serial chain connection of the pullup and pulldown devices within each I/O pad. The states are then maintained by each pullup and pulldown device until a subsequent reprogramming. Software programs may also reprogram the pullup and pulldown states by storing appropriate values into the shift data storage. The program then sets an appropriate value into a status register included within the integrated circuit. Upon detection of the value within the status register, the integrated circuit reprograms the high impedance states of the I/O pads with the states stored in the shift data storage.