A METHOD AND SYSTEM FOR PROVIDING AN INTEGRATED CIRCUIT DEVICE THAT ALLOWS FOR A HIGH FIELD THRESHOLD VOLTAGE UTILIZING RESIST PULLBACK OF THE FIELD IMPLANT REGION
    1.
    发明申请
    A METHOD AND SYSTEM FOR PROVIDING AN INTEGRATED CIRCUIT DEVICE THAT ALLOWS FOR A HIGH FIELD THRESHOLD VOLTAGE UTILIZING RESIST PULLBACK OF THE FIELD IMPLANT REGION 审中-公开
    一种用于提供使用现场植被区域的电阻式拉杆的高场阈值电压的集成电路装置的方法和系统

    公开(公告)号:WO1996017380A1

    公开(公告)日:1996-06-06

    申请号:PCT/US1995014447

    申请日:1995-10-18

    CPC classification number: H01L21/823807 H01L21/76218

    Abstract: A method and apparatus provides an integrated circuit device that allows for a high field threshold voltage by minimizing the parasitic transistors located therein. The integrated circuit includes a well region, a source/drain region, a nitride layer and a first oxide layer coupled to the well region. The system masks and etches a nitride layer and then provides a field implant region in the well area. Thereafter, it etches the nitride again where the field implant region is moved away from the source/drain region. In so doing, the field implant region is spaced away from the source/drain region of the device and therefore the breakdown voltage of the device is effectively increased.

    Abstract translation: 一种方法和装置提供一种通过使位于其中的寄生晶体管最小化来允许高场阈值电压的集成电路器件。 集成电路包括阱区,源极/漏极区,氮化物层和耦合到阱区的第一氧化物层。 该系统掩盖和蚀刻氮化物层,然后在阱区域中提供场注入区域。 此后,其再次蚀刻氮化物,其中场注入区域远离源极/漏极区域移动。 在这样做时,场注入区域与器件的源极/漏极区域间隔开,因此器件的击穿电压被有效地提高。

    A METHOD AND SYSTEM FOR PROVIDING AN INTEGRATED CIRCUIT DEVICE THAT ALLOWS FOR A HIGH FIELD THRESHOLD VOLTAGE UTILIZING OXIDE SPACERS
    2.
    发明申请
    A METHOD AND SYSTEM FOR PROVIDING AN INTEGRATED CIRCUIT DEVICE THAT ALLOWS FOR A HIGH FIELD THRESHOLD VOLTAGE UTILIZING OXIDE SPACERS 审中-公开
    用于提供使用氧化物间隔物的高场阈值电压的集成电路装置的方法和系统

    公开(公告)号:WO1996017379A1

    公开(公告)日:1996-06-06

    申请号:PCT/US1995013138

    申请日:1995-10-18

    CPC classification number: H01L21/76202 H01L21/32 H01L21/76218 H01L27/092

    Abstract: A method and apparatus provides an integrated circuit device that allows for a high field threshold voltage by minimizing the parasitic transistors located therein. In this system, an oxide layer is provided over the transistor. The layer is then etched to the top of the nitride layer, thereby allowing oxide portions on the sides thereof to be utilized as the mask when the implant is provided. These oxide portions are utilized to space the field implant away from the source drain region of the device and therefore the breakdown voltage is effectively increased.

    Abstract translation: 一种方法和装置提供一种通过使位于其中的寄生晶体管最小化来允许高场阈值电压的集成电路器件。 在该系统中,在晶体管上提供氧化物层。 然后将该层蚀刻到氮化物层的顶部,从而当设置植入物时,允许其侧面上的氧化物部分用作掩模。 这些氧化物部分用于将场注入物远离器件的源极漏极区域,从而有效地增加击穿电压。

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