公开(公告)号：EP0339871A2

公开(公告)日：1989-11-02

申请号：EP89303936.2

申请日：1989-04-20

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Hatcher, Owen W., Jr.

IPC: H01L23/48

CPC classification number: H01L24/05 ,  H01L23/53223 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/0347 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2224/85201 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2924/00015 ,  H01L2924/01201

Abstract: A corrosion tolerant bonding pad for a semiconductor device includes an interconnect (12) formed on the substrate (10) of the semiconductor device, a passivating layer (16) provided on the interconnect, the passivating layer having an aperture for exposing an enlarged bonding region of the interconnect, a barrier layer (28) provided on the exposed enlarged bonding area of the interconnect (12) and on portions of the passivating layer (16) surrounding the bonding area, and a bonding layer (30) provided on the barrier layer (28). The barrier layer is a non-corrosive, conductive material, for example, a compound of titanium and tungsten (TiW -- known as ti-tungsten).

Abstract translation: 一种用于半导体器件的耐腐蚀性焊盘包括形成在半导体器件的衬底（10）上的互连（12），设置在互连上的钝化层（16），该钝化层具有用于暴露扩大的接合区域 设置在所述互连件（12）的所述暴露的扩大的接合区域上并且围绕所述接合区域的所述钝化层（16）的部分上的阻挡层（28）以及设置在所述阻挡层上的接合层（30） （28）。 阻挡层是非腐蚀性的导电材料，例如钛和钨的化合物（TiW，称为钛 - 钨）。

公开(公告)号：EP0345924A2

公开(公告)日：1989-12-13

申请号：EP89303544.4

申请日：1989-04-11

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Hatcher, Owen W., Jr.

IPC: H01L21/66

CPC classification number: H01L24/05 ,  C23F1/02 ,  H01L21/31111 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/0347 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2924/00015 ,  H01L2224/05599

Abstract: A method of detecting defects in a passivating layer (16) includes the step of providing masks (32) on any portions of a device intentionally exposed through the passivating layer, exposing the device to an etchant which penetrates the passivating layer through any defects therein and etches any interconnects (12) underlying the defects, and testing to detect any portions of the interconnect which are etched.

Abstract translation: 一种检测钝化层（16）中的缺陷的方法包括在通过钝化层有意暴露的器件的任何部分上提供掩模（32）的步骤，将器件暴露于通过其中的任何缺陷渗透钝化层的蚀刻剂，以及 蚀刻缺陷之下的任何互连（12），并测试以检测被蚀刻的互连的任何部分。

公开(公告)号：EP0339871A3

公开(公告)日：1990-12-27

申请号：EP89303936.2

申请日：1989-04-20

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Hatcher, Owen W., Jr.

IPC: H01L23/48

CPC classification number: H01L24/05 ,  H01L23/53223 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/0347 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2224/85201 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2924/00015 ,  H01L2924/01201

Abstract: A corrosion tolerant bonding pad for a semiconductor device includes an interconnect (12) formed on the substrate (10) of the semiconductor device, a passivating layer (16) provided on the interconnect, the passivating layer having an aperture for exposing an enlarged bonding region of the interconnect, a barrier layer (28) provided on the exposed enlarged bonding area of the interconnect (12) and on portions of the passivating layer (16) surrounding the bonding area, and a bonding layer (30) provided on the barrier layer (28). The barrier layer is a non-corrosive, conductive material, for example, a compound of titanium and tungsten (TiW -- known as ti-tungsten).

公开(公告)号：EP0345924A3

公开(公告)日：1990-07-04

申请号：EP89303544.4

申请日：1989-04-11

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Hatcher, Owen W., Jr.

IPC: H01L21/66

CPC classification number: H01L24/05 ,  C23F1/02 ,  H01L21/31111 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/0347 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/48724 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/05042 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/48744 ,  H01L2924/00015 ,  H01L2224/05599

Abstract: A method of detecting defects in a passivating layer (16) includes the step of providing masks (32) on any portions of a device intentionally exposed through the passivating layer, exposing the device to an etchant which penetrates the passivating layer through any defects therein and etches any interconnects (12) underlying the defects, and testing to detect any portions of the interconnect which are etched.

Abstract translation: 一种检测钝化层（16）中的缺陷的方法包括在通过钝化层有意暴露的器件的任何部分上提供掩模（32）的步骤，将器件暴露于通过其中的任何缺陷渗透钝化层的蚀刻剂，以及 蚀刻缺陷之下的任何互连（12），并测试以检测被蚀刻的互连的任何部分。