GATE OXIDE VOLTAGE LIMITING DEVICES FOR DIGITAL CIRCUITS
    1.
    发明申请
    GATE OXIDE VOLTAGE LIMITING DEVICES FOR DIGITAL CIRCUITS 审中-公开
    用于数字电路的栅极氧化物电压限制器件

    公开(公告)号:WO1997029544A1

    公开(公告)日:1997-08-14

    申请号:PCT/US1996015029

    申请日:1996-09-19

    CPC classification number: H03K19/00315

    Abstract: An oxide protection circuit prevents failure of the MOS transistors in a digital device. A voltage difference at a gate oxide of a digital device does not exceed a breakdown voltage magnitude. The gate oxide protection circuit includes a plurality of transistors which turn OFF or ON when a node reaches a predetermined voltage of Vrefp+Vt or Vrefn-Vt, where Vrefp and Vrefn are references applied at a gate of a PMOS or an NMOS transistor, and Vt equals a threshold voltage of the MOS transistor.

    Abstract translation: 氧化物保护电路防止数字装置中的MOS晶体管的故障。 数字装置的栅极氧化物处的电压差不超过击穿电压的大小。 栅极氧化物保护电路包括当节点达到Vrefp + Vt或Vrefn-Vt的预定电压时关断或导通的多个晶体管,其中Vrefp和Vrefn是在PMOS或NMOS晶体管的栅极处施加的基准,以及 Vt等于MOS晶体管的阈值电压。

    GATE OXIDE VOLTAGE LIMITING DEVICES FOR DIGITAL CIRCUITS
    2.
    发明公开
    GATE OXIDE VOLTAGE LIMITING DEVICES FOR DIGITAL CIRCUITS 失效
    PUNCH门电路数字电路

    公开(公告)号:EP0862815A1

    公开(公告)日:1998-09-09

    申请号:EP96931648.0

    申请日:1996-09-19

    Inventor: MALEY, Reading

    CPC classification number: H03K19/00315

    Abstract: An oxide protection circuit prevents failure of the MOS transistors in a digital device. A voltage difference at a gate oxide of a digital device does not exceed a breakdown voltage magnitude. The gate oxide protection circuit includes a plurality of transistors which turn OFF or ON when a node reaches a predetermined voltage of Vrefp+Vt or Vrefn-Vt, where Vrefp and Vrefn are references applied at a gate of a PMOS or an NMOS transistor, and Vt equals a threshold voltage of the MOS transistor.

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