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    BUILT-IN-SELF-TEST OF FLASH MEMORY CELLS
    1.
    发明申请
    BUILT-IN-SELF-TEST OF FLASH MEMORY CELLS 审中-公开
    闪存存储器内部自检

    公开(公告)号：WO2004010437A1

    公开(公告)日：2004-01-29

    申请号：PCT/US2003/018309

    申请日：2003-06-10

    Applicant: ADVANCED MICRO DEVICES, INC.

    Inventor： BILL, Colin, S. ,  HALIM, Azrul ,  HAMILTON, Darlene ,  BAUTISTA, Edward, V., Jr. ,  LEE, Weng, Fook ,  CHEAH, Ken, Cheong ,  LAW, Chee, Boon ,  TEH, Boon, Tang ,  KUCERA, Joseph ,  SALLEH, Syahrizal

    IPC: G11C29/00

    CPC classification number: G11C29/72 ,  G11C16/04 ,  G11C29/16 ,  G11C29/44 ,  G11C29/48

    Abstract: In a BIST (built-in-self-test) system (300) for testing flash memory cells (304) fabricated on a semiconductor substrate (302), a BIST (built-in-self-test) interface (312), a front-end state machine (314), and a back-end state machine (316) are fabricated on the semiconductor substrate (302). The BIST interface (312) inputs test mode data from an external test system (318), and the front-end state machine (314) decodes the test mode data to determine an order for performing at least one desired test mode. The back-end state machine (316) performs the at least one desired test mode on the flash memory cells (304) according to the order for on-­chip testing of the flash memory cells (304).

    Abstract translation: 在用于测试制造在半导体衬底（302）上的闪存单元（304）的BIST（内置自测试）系统（300）中，BIST（内置自检）接口（312）， 前端状态机（314）和后端状态机（316）制造在半导体衬底（302）上。 BIST接口（312）从外部测试系统（318）输入测试模式数据，并且前端状态机（314）解码测试模式数据，以确定执行至少一个所需测试模式的顺序。 后端状态机（316）根据闪速存储器单元（304）的片上测试顺序在闪速存储单元（304）上执行至少一个期望的测试模式。

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