公开(公告)号：JPH06324775A

公开(公告)日：1994-11-25

申请号：JP2972294

申请日：1994-02-28

Applicant: ADVANCED MICRO DEVICES INC

Inventor： JIERII DEI MOENCHI

IPC: G06F3/00 ,  G11C7/10 ,  H03K17/00 ,  H03K17/693

Abstract: PURPOSE: To exclude contention which possibly occurs among memory cells and to improve the performance of a multiplexer structure by executing compulsory sequential consideration of whether respective wide bus lines are to be connected to a single bus line or not. CONSTITUTION: A circuit 16 contains plural memory cell bits 18. When the left memory cell bit 18 is programmed to be on, a node A20 is dropped to be low, an inverter 22 is set to be high or a path gate 24 is raised to be high and the path gate 24 connects a line X026 to a line YOUT 28. When the node A20 is low, a ground line path gate 30 becomes low and a ground route 32 to the ring part of the circuit 16 is excluded. Thus, a node B34 is set to be high in spite of the programmed state of the right memory cell bit 18. When the node B34 is high, the inverter 36 drops the path gate 38 to be low and cuts the connection of the line X140 and the line YOUT 28.

公开(公告)号：JPH06188723A

公开(公告)日：1994-07-08

申请号：JP18530993

申请日：1993-07-27

Applicant: ADVANCED MICRO DEVICES INC

Inventor： OMU PII AGURAWARU ,  JIERII DEI MOENCHI ,  KERII EI IRUGENSUTAIN

IPC: H03K19/173 ,  H03K19/177

Abstract: PURPOSE: To provide an architecture used for a programmable logical device which can reduce proportionally from low density to very high density. CONSTITUTION: The >=2 programmable logical blocks 210A, 215A and BC are connected to each other by a switch matrix including a programmable input switch matrix 220A and a programmable concentrated switch matrix 230. Then the programmable logical blocks receive the input signals only from the concentrated switch matrix 230. Output signals sent from the programmable logical blocks are connected to plural I/O pins 205A by an output switch matrix 240A and also sent directly to the input switch matrix 220A. Furthermore, an input macro cell 203A connects the signals existing on the I/O pin that drives the input macro cell, i.e. on the related I/O pins to the programmable input switch matrix 230.