公开(公告)号：JPH0514333A

公开(公告)日：1993-01-22

申请号：JP26227691

申请日：1991-10-09

Applicant: ADVANCED MICRO DEVICES INC

Inventor： JIYON EMU UINKUN

IPC: H03L7/08 ,  H03K3/03 ,  H03L7/089 ,  H04L7/033 ,  H04L25/49

Abstract: PURPOSE: To provide a receiver with the phase locked loop of a device for extracting a buried clock in the flow of data which is Manchester-encoded and with metal oxide semiconductor structure. CONSTITUTION: A multiplexer 14 selects the output of a receiver 16 or external clock reference 20. The external reference is the 10MHz signal of plus or minus 0.01%. VCO 34 drives a one shot and timing circuit. At output frequency is scaled by a scaling circuit 36 and is fed back to a phase frequency detector 30. The scaling circuit 36 is a four-division circuit. A control line is used for stopping the operation of VCO 34 and the scaling circuit and for initialization. The phase locked loop 12 is speedily locked to preamble before the data part of a packed which is Manchester-encoded reaches. When a data packet completes, the external reference clock 20 is selected again.

公开(公告)号：JPH0548466A

公开(公告)日：1993-02-26

申请号：JP31491291

申请日：1991-11-28

Applicant: ADVANCED MICRO DEVICES INC

Inventor： JIEFURII EMU BURUMENSARU ,  JIYON EMU UINKUN ,  NADERU BIJIEE ,  IAN ESU KUREIFUOODO

IPC: H03M7/00 ,  H03K5/02 ,  H03K5/13 ,  H03K5/1534 ,  H03K5/156 ,  H03K19/0185 ,  H03M5/12 ,  H04L25/02 ,  H04L25/08 ,  H04L25/49

Abstract: PURPOSE: To detect the inverted polarity of a pair of differential input lines and to automatically corret it. CONSTITUTION: A differential receiver 10 incorporated in MAU receiving a link pulse and a Manchester packed has a polarity detection circuit 14 for automatically detecting the inverted polarity against RD input lines RD and RD and a correction circuit 12. The differential receiver samples an input pulse for the recognition of time, amplitude and pulse width and decides a preliminary polarity based on the polarity of the recognized pulse. The preliminary polarity enables a link test state machine to shift to a link path state and realizes the output driver of MAU. Link pulse polarity information decides polarity at first for the whole differential receiver asserting a FIX POLARITY signal. The FIX POLARITY signal controls the correction circuit and it internally corrects the inverted input lines.