公开(公告)号：JPH07221780A

公开(公告)日：1995-08-18

申请号：JP27114094

申请日：1994-11-04

Applicant: ADVANCED MICRO DEVICES INC

Inventor： MASHIYUU JIEEMUZU FUITSUSHIYAA ,  GUREN GIBUSON ,  TOOMASU JIEFUAASON RUNARUDEYUU ,  JIEFUERII DOUWAAKU

IPC: G06F13/00 ,  G06F13/12 ,  H04L12/56 ,  H04L12/40 ,  H04L12/02

Abstract: PURPOSE: To accelerate the reception speed of a data packet from a network. CONSTITUTION: The system for ensuring the operation of an 'Ethernet' controller 22 so that the waiting time of a bus and the use of a central processing unit CPU are optimized in a network environment at the time of receiving the data packet is provided. A system prepares for the reception and the transmission of the data packet, from the 'Ethernet' controller during the waiting time of the network by effectively using plural buffer memories #1, #2 and #3 and a driver and by using the bus in connection to the controller 22. Thus, the whole performance of the network improves.