公开(公告)号：JPH02215228A

公开(公告)日：1990-08-28

申请号：JP32705789

申请日：1989-12-15

Applicant: ADVANCED MICRO DEVICES INC

Inventor： MIKI TSUBI MOYARU

IPC: H03M1/38 ,  H03M1/00 ,  H03M3/02

Abstract: PURPOSE: To provide an analog/digital converter which is relatively insensitive to a noise by sampling an analog signal in a differential mode, and operating analog/digital conversion by providing a non-switch capacitance integrator in a specific design. CONSTITUTION: An analog signal is applied to a circuit 20 by a split input stage 25 equipped with two arithmetic amplifiers 26 and 27, an analog voltage input is received through a line 28, and this input is converted into a differential analog current signal by resistance R2 and R3. Those current signals are transmitted through lines 28 and 29 to an integrator input stage 30. Differential reference currents are applied from a DAC 35 with 6.02dB per bit through lines 31 and 32 to the integrator stage 30. The analog and reference currents are connected at nodes 33 and 34 of a dual common node feedback loop 36, and integrated by capacitors C1 and C2. The analog current signal is compared with the reference generated current signal by a comparator 40 so that the signal can be digitized.

公开(公告)号：JPH02218216A

公开(公告)日：1990-08-30

申请号：JP32941989

申请日：1989-12-18

Applicant: ADVANCED MICRO DEVICES INC

Inventor： MIKI TSUBI MOYARU ,  RAIAN AABIN FUIIMUSUTAA

IPC: H03K5/08 ,  H03K3/356

Abstract: PURPOSE: To stabilize a first latching signal by connecting a clock operating signal with first and second latch switches, supplying two clock operating signals, and continuously opening the second latch switch after the first latch switch with delay. CONSTITUTION: Delay in about 15 and 25 nano seconds is introduced at the time of opening a switch 16. This added delay C is introduced to lines 20 and 21, and the switch 16 is controlled by an invertor 23. The switch 16 is opened, and the operation of a latching stage 15 is delayed so that instability in nodes B and B' after the switch 14 is opened can be stabilized, and a signal can be sampling-processed with a further high differential value. The switch 16 is opened after the switch 14 so that any latent capacitance effect can be stabilized in the nodes B and B'. Thus, a gain which is 500 times and 1000 times from an input can be obtained, and nodes A and A can be stabilized by intruding the delay C.