公开(公告)号：JPH02218216A

公开(公告)日：1990-08-30

申请号：JP32941989

申请日：1989-12-18

Applicant: ADVANCED MICRO DEVICES INC

Inventor： MIKI TSUBI MOYARU ,  RAIAN AABIN FUIIMUSUTAA

IPC: H03K5/08 ,  H03K3/356

Abstract: PURPOSE: To stabilize a first latching signal by connecting a clock operating signal with first and second latch switches, supplying two clock operating signals, and continuously opening the second latch switch after the first latch switch with delay. CONSTITUTION: Delay in about 15 and 25 nano seconds is introduced at the time of opening a switch 16. This added delay C is introduced to lines 20 and 21, and the switch 16 is controlled by an invertor 23. The switch 16 is opened, and the operation of a latching stage 15 is delayed so that instability in nodes B and B' after the switch 14 is opened can be stabilized, and a signal can be sampling-processed with a further high differential value. The switch 16 is opened after the switch 14 so that any latent capacitance effect can be stabilized in the nodes B and B'. Thus, a gain which is 500 times and 1000 times from an input can be obtained, and nodes A and A can be stabilized by intruding the delay C.