公开(公告)号：JPH0715454A

公开(公告)日：1995-01-17

申请号：JP8119594

申请日：1994-04-20

Applicant: ADVANCED MICRO DEVICES INC

Inventor： NEIDAA BIJIE ,  UIRIAMU ROO

IPC: H04L29/08 ,  H04L12/22 ,  H04L12/44 ,  H04L29/06 ,  H04L12/40

Abstract: PURPOSE: To provide a system used in a network for certainly preventing the reception of data without any authority and providing safety. CONSTITUTION: This system prevents a port without any authority from receiving certain data by using a jamming sequence. A repeater used in a network is provided with a capability to detect a specific data sequence, and improved characteristics are provided.

公开(公告)号：JPH06261102A

公开(公告)日：1994-09-16

申请号：JP29980093

申请日：1993-11-30

Applicant: ADVANCED MICRO DEVICES INC

Inventor： IAN ESU KUREIFUOODO ,  UIRIAMU ROO ,  NADAA BIJIE

IPC: H04L29/10 ,  H04L12/46 ,  H04L13/08

Abstract: PURPOSE: To provide the system which monitors the source address of an incoming packet on a repeater and compares it with an internally stored value. CONSTITUTION: This is a system used for a network and a system which authenticates a data packet, gives safety for securely preventing unauthenticated data from being received, performs improved monitoring of data packets sent and received through the network, and detects changes of the network topology. The repeater used for this system provides improved features by giving detecting and interpreting capability for packet data, and a source address(AS), a destination address(DA), and a field.

公开(公告)号：JPH07200383A

公开(公告)日：1995-08-04

申请号：JP23982794

申请日：1994-10-04

Applicant: ADVANCED MICRO DEVICES INC

Inventor： UIRIAMU ROO

IPC: G11C11/401 ,  G06F12/00 ,  G11C8/16 ,  G11C11/41

Abstract: PURPOSE: To provide a memory system which has high density and low cost and gives plural memory read/write enable interfaces to a memory. CONSTITUTION: In a multi-port memory system 130 which used a memory 131 having a write port 133 and a read port 132, the write port 133 includes a write data line, a write address and a write enable line and the read port 132 includes a read data line, a read address and a read enable line respectively. Then the system 130 includes plural memory read/write interfaces and a controller 138 which is connected to every read/write request lien and every read/write enable line and arbitrates the memory accesses via plural interfaces.