公开(公告)号：WO1998007292A1

公开(公告)日：1998-02-19

申请号：PCT/US1997009546

申请日：1997-06-02

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  MILLS, Andrew

IPC: H04Q11/04

CPC classification number: H04Q11/0428 ,  H04Q2213/13031 ,  H04Q2213/13034 ,  H04Q2213/1305 ,  H04Q2213/1309 ,  H04Q2213/13103 ,  H04Q2213/13106 ,  H04Q2213/13107 ,  H04Q2213/13174 ,  H04Q2213/13176 ,  H04Q2213/13199 ,  H04Q2213/13202 ,  H04Q2213/13204 ,  H04Q2213/13205 ,  H04Q2213/13208 ,  H04Q2213/13209 ,  H04Q2213/13292 ,  H04Q2213/13335 ,  H04Q2213/13396

Abstract: communications device (200) is presented which is configured to provide selective signal processing at a "plain old telephone service" (POTS) interface, and ISDN U interface, or an ISDN S/T interface. A first POTS connector (208) allows the communications device to be connected to an analog POTS telephone line. A second ISDN U connector (209) allows the communications device to be connected to an ISDN network at an ISDN U interface point. A third ISDN S/T connector (213) allows the communications device to be connected to an ISDN network at an ISDN S/T interface point. A digital signal processing (DSP) core (202) performs: (i) analog modem functions via analog modem emulation when a POTS telephone line is connected to the POTS connector, or (ii) ISDN digital voice and data processing functions along with ISDN S/T and U interface functions when an ISDN line is connected to the ISDN U connector, or (iii) ISDN digital voice and data processing functions along with ISDN S/T interface functions when an ISDN line is connected to the ISDN S/T connector. Interface logic couples signals between the DSP core and the connectors. A digital data path multiplexer (204) coupled between the DSP core and the interface logic includes "autosense" logic (2220) which monitors signals received by the connector coupled to the telephone line and determines a data transfer mode based upon the received signals. The digital data path multiplexer provides the data transfer mode information to the DSP core, and the DSP core performs communications operations according to data transfer mode information.

Abstract translation: 通信设备（200）被配置为在“普通老式电话服务”（POTS）接口，ISDN U接口或ISDN S / T接口上提供选择性信号处理。 第一POTS连接器（208）允许通信设备连接到模拟POTS电话线路。 第二个ISDN U连接器（209）允许通信设备在ISDN U接口点连接到ISDN网络。 第三个ISDN S / T连接器（213）允许通信设备在ISDN S / T接口点连接到ISDN网络。 数字信号处理（DSP）核心（202）执行：（i）当POTS电话线连接到POTS连接器时，通过模拟调制解调器仿真进行模拟调制解调器功能，或（ii）ISDN数字语音和数据处理功能以及ISDN S 当ISDN线路连接到ISDN U连接器时，/ T和U接口功能，或（iii）当ISDN线路连接到ISDN S / T连接器时，ISDN数字语音和数据处理功能以及ISDN S / T接口功能 。 接口逻辑在DSP内核和连接器之间耦合信号。 耦合在DSP内核和接口逻辑之间的数字数据路径多路复用器（204）包括监视由耦合到电话线的连接器接收的信号的“自动检测”逻辑（2220），并根据接收的信号确定数据传输模式。 数字数据路径多路复用器将数据传输模式信息提供给DSP内核，DSP内核根据数据传输模式信息执行通信操作。

公开(公告)号：WO1997042569A1

公开(公告)日：1997-11-13

申请号：PCT/US1997001183

申请日：1997-01-24

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ADVANCED MICRO DEVICES, INC. ,  MILLS, Andrew ,  IRETON, Mark, A. ,  LYNCH, Thomas, W.

IPC: G06F09/42

CPC classification number: G06F9/3885 ,  G06F9/30145 ,  G06F9/4486

Abstract: A microprocessor including an instruction decode unit configured to detect a DSP call instruction is provided. The DSP call instruction is indicative of a call to a subroutine which performs a DSP function. Detected DSP call instructions are routed to a DSP which executes a routing performing the corresponding function. Subsequent to the DSP completing execution of the routine, the microprocessor continues execution at the instruction subsequent to the DSP call instruction. If a DSP is not included in the computer system, the DSP call instruction is executed in a manner similar to a subroutine call instruction. The microprocessor subsequently executes a corresponding routine which performs the DSP function.

Abstract translation: 提供了一种微处理器，包括被配置为检测DSP调用指令的指令解码单元。 DSP调用指令表示对执行DSP功能的子程序的调用。 检测到的DSP调用指令被路由到执行执行相应功能的路由的DSP。 在DSP完成程序的执行之后，微处理器在DSP调用指令之后的指令处继续执行。 如果DSP不包括在计算机系统中，则以与子程序调用指令类似的方式执行DSP调用指令。 微处理器随后执行执行DSP功能的相应程序。

公开(公告)号：EP1036358A1

公开(公告)日：2000-09-20

申请号：EP98923500.7

申请日：1998-05-18

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： ASGHAR, Saf ,  MILLS, Andrew

IPC: G06F9/318 ,  G06F9/38

CPC classification number: G06F9/3822 ,  G06F9/3017 ,  G06F9/30174 ,  G06F9/30189 ,  G06F9/30196 ,  G06F9/382 ,  G06F9/3836 ,  G06F9/384 ,  G06F9/3855 ,  G06F9/3857 ,  G06F9/3885 ,  G06F15/7857

Abstract: A CPU or microprocessor which includes a general purpose CPU component, such as an X86 core, and also includes a DSP core. In a first embodiment, the CPU receives general purpose instructions, such as X86 instructions, wherein certain X86 instruction sequences implement DSP functions. The CPU includes a processor mode register which is written with one or more processor mode bits to indicate whether an instruction sequence implements a DSP function. The CPU also includes an intelligent DSP function decoder or preprocessor which examines the processor mode bits and determines if a DSP function is being executed. If a DSP function is being implemented by an instruction sequence, the DSP function decoder converts or maps the opcodes to a DSP macro instruction that is provided to the DSP core. The DSP core executes one or more DSP instru tions to implement the desired DSP function in response to the mcro instruction. If the processor mode bits indicate that X86 instructions in the instruction memory do not implement a DSP-type function, the opcodes are provided to the X86 core as which occurs in current prior art computer systems. In a second embodiment, the CPU receives sequences of instructions comprising X86 instructions and DSP instructions. The processor mode register is written with one or more processor mode bits to indicate whether an instruction sequence comprises X86 or DSP instructions, and the instructions are routed to the X86 core or to the DSP core accordingly.

公开(公告)号：EP0919105A1

公开(公告)日：1999-06-02

申请号：EP97928797.0

申请日：1997-06-02

Applicant: Advanced Micro Devices, Inc.

Inventor： MILLS, Andrew

IPC: H04Q11

CPC classification number: H04Q11/0428 ,  H04Q2213/13031 ,  H04Q2213/13034 ,  H04Q2213/1305 ,  H04Q2213/1309 ,  H04Q2213/13103 ,  H04Q2213/13106 ,  H04Q2213/13107 ,  H04Q2213/13174 ,  H04Q2213/13176 ,  H04Q2213/13199 ,  H04Q2213/13202 ,  H04Q2213/13204 ,  H04Q2213/13205 ,  H04Q2213/13208 ,  H04Q2213/13209 ,  H04Q2213/13292 ,  H04Q2213/13335 ,  H04Q2213/13396

Abstract: communications device (200) is presented which is configured to provide selective signal processing at a 'plain old telephone service' (POTS) interface, and ISDN U interface, or an ISDN S/T interface. A first POTS connector (208) allows the communications device to be connected to an analog POTS telephone line. A second ISDN U connector (209) allows the communications device to be connected to an ISDN network at an ISDN U interface point. A third ISDN S/T connector (213) allows the communications device to be connected to an ISDN network at an ISDN S/T interface point. A digital signal processing (DSP) core (202) performs: (i) analog modem functions via analog modem emulation when a POTS telephone line is connected to the POTS connector, or (ii) ISDN digital voice and data processing functions along with ISDN S/T and U interface functions when an ISDN line is connected to the ISDN U connector, or (iii) ISDN digital voice and data processing functions along with ISDN S/T interface functions when an ISDN line is connected to the ISDN S/T connector. Interface logic couples signals between the DSP core and the connectors. A digital data path multiplexer (204) coupled between the DSP core and the interface logic includes 'autosense' logic (2220) which monitors signals received by the connector coupled to the telephone line and determines a data transfer mode based upon the received signals. The digital data path multiplexer provides the data transfer mode information to the DSP core, and the DSP core performs communications operations according to data transfer mode information.

公开(公告)号：EP0919105B1

公开(公告)日：2002-10-02

申请号：EP97928797.6

申请日：1997-06-02

Applicant: Advanced Micro Devices, Inc.

Inventor： MILLS, Andrew

IPC: H04Q11/04

CPC classification number: H04Q11/0428 ,  H04Q2213/13031 ,  H04Q2213/13034 ,  H04Q2213/1305 ,  H04Q2213/1309 ,  H04Q2213/13103 ,  H04Q2213/13106 ,  H04Q2213/13107 ,  H04Q2213/13174 ,  H04Q2213/13176 ,  H04Q2213/13199 ,  H04Q2213/13202 ,  H04Q2213/13204 ,  H04Q2213/13205 ,  H04Q2213/13208 ,  H04Q2213/13209 ,  H04Q2213/13292 ,  H04Q2213/13335 ,  H04Q2213/13396

Abstract: communications device (200) is presented which is configured to provide selective signal processing at a 'plain old telephone service' (POTS) interface, and ISDN U interface, or an ISDN S/T interface. A first POTS connector (208) allows the communications device to be connected to an analog POTS telephone line. A second ISDN U connector (209) allows the communications device to be connected to an ISDN network at an ISDN U interface point. A third ISDN S/T connector (213) allows the communications device to be connected to an ISDN network at an ISDN S/T interface point. A digital signal processing (DSP) core (202) performs: (i) analog modem functions via analog modem emulation when a POTS telephone line is connected to the POTS connector, or (ii) ISDN digital voice and data processing functions along with ISDN S/T and U interface functions when an ISDN line is connected to the ISDN U connector, or (iii) ISDN digital voice and data processing functions along with ISDN S/T interface functions when an ISDN line is connected to the ISDN S/T connector. Interface logic couples signals between the DSP core and the connectors. A digital data path multiplexer (204) coupled between the DSP core and the interface logic includes 'autosense' logic (2220) which monitors signals received by the connector coupled to the telephone line and determines a data transfer mode based upon the received signals. The digital data path multiplexer provides the data transfer mode information to the DSP core, and the DSP core performs communications operations according to data transfer mode information.