公开(公告)号：EP1040513A1

公开(公告)日：2000-10-04

申请号：EP98963261.7

申请日：1998-12-18

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： TRAN, Khanh ,  HUANG, Richard, J. ,  CHAN, Simon, S. ,  YOU, Lu

IPC: H01L21/3105 ,  H01L21/768

CPC classification number: H01L21/3105 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76828 ,  Y10S438/958

Abstract: Borderless vias (55) are formed in electrical connection with a lower metal feature of a metal pattern gap filled with HSQ (52). Heat treatment in an inert atmosphere is conducted before filling the through-hole to outgas water absorbed during solvent cleaning of the through-hole, thereby reducing via void formation and improving via integrity.

公开(公告)号：EP1029344A1

公开(公告)日：2000-08-23

申请号：EP98953699.0

申请日：1998-10-16

Applicant: ADVANCED MICRO DEVICES INC.

Inventor： CHEN, Robert, C. ,  SHIELDS, Jeffrey, A. ,  DAWSON, Robert ,  TRAN, Khanh

IPC: H01L21/314 ,  H01L21/768

CPC classification number: H01L21/314 ,  H01L21/76826 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Spin-on HSQ (52) is employed to gap fill metal layers in manufacturing a high density, multimetal layer semiconductor device. The degradation of deposited HSQ layers during formation of borderless vias (55), as from photoresist stripping using an O2-containing plasma, is overcome by treating the degraded HSQ layer (52) with an H2-containing plasma to restore the dangling Si-H bonds, thereby passivating the surface and preventing moisture absorption, before filling the via opening with conductive material (56, 57), such as a barrier layer (57).