-
公开(公告)号：DE3482678D1
公开(公告)日：1990-08-16
申请号：DE3482678
申请日：1984-09-05
Applicant: ADVANTEST CORP
Inventor： KASAHARA TOSHIHARU , OGAMI TAKAYUKI , KITAYOSHI HITOSHI
Abstract: @ A set value of a frequency setting register (11) is accumulated upon each occurrence of a clock signal, and a waveform memory (14) is read out by using the accumulated value as an address. In the waveform memory, amplitude data of one cycle of the waveform of a burst signal to be generated are stored at fixed phase intervals. The output read out of the waveform memory is converted into an analog signal. A wave-number counter (21) counts the number of times the amplitude data of one cycle is read out of the waveform memory and, when having counted by preset number of waves, yields a wave-number counting end signal. After the occurrence of the wave-number counting end signal a phase counter (31) counts clock signals, and when the count value of the phase counter reaches a value corresponding to a preset end phase, the generation of the burst signal is stopped.
-
公开(公告)号：JPS61116671A
公开(公告)日：1986-06-04
申请号：JP23713184
申请日：1984-11-09
Applicant: Advantest Corp
Inventor： OGAMI TAKAYUKI
Abstract: PURPOSE: To measure the frequency characteristic of an object to be inspected accurately, by applying a digital noise signal to a D/A converter to be converted into digital from analog while a correction circuit is provided against the leakage of carrier generated in the use of the D/A converter.
CONSTITUTION: A digital noise signal outputted from a noise signal source 1 is inputted into a D/A converter 11 while an analog carrier signal f
s is inputted into a reference voltage terminal V
ref from a carrier signal source 2 through a D/A converter 10. A signal to be modulated obtained by multiplying the digital noise signal by the signal f
s is outputted to an analog adder 12 from the converter 11 while the signal f
s is applied to the adder 12 through a correction circuit 13. In other words, the carrier signal applied to the terminal V
ref undergoes a voltage division 14 and the signal f
s is applied to a characteristic matching circuit 16 through a buffer 15 to be added to the leakage value of the carrier signal in the converter 11 therewith 16. This enables the selection of the characteristic ensuring the existence of a certain carrier component regardless of change in the signal f
s to any frequency thereby making the carrier signal component contained in the signal to be outputted 8 flat in the level over the entire band range.
COPYRIGHT: (C)1986,JPO&JapioAbstract translation: 目的：通过将数字噪声信号应用于D / A转换器，从模拟量转换为数字式的方式来测量待检测对象的频率特性，同时提供校正电路，以防止在使用 D / A转换器。 构成：从噪声信号源1输出的数字噪声信号被输入到D / A转换器11，同时模拟载波信号fs通过D / A转换器10从载波信号源2输入到参考电压端子Vref。 通过将数字噪声信号乘以信号fs获得的要被调制的信号由转换器11输出到模拟加法器12，同时通过校正电路13将信号fs加到加法器12上。换句话说，载波信号 施加到端子Vref的电压经过电压分割14，并且信号fs通过缓冲器15被施加到特性匹配电路16，以与其中的转换器11中的载波信号的泄漏值相加。这使得能够选择 特性确保某个载波分量的存在，而不管信号fs中的任何频率如何变化，从而使包含在信号中的载波信号分量被输出8 在整个频段范围内平坦。
-
公开(公告)号：JPH0454772A
公开(公告)日：1992-02-21
申请号：JP16529590
申请日：1990-06-22
Applicant: ADVANTEST CORP
Inventor： OGAMI TAKAYUKI , OZAWA HIROMI
Abstract: PURPOSE:To extract a regular synchronizing signal for an equalizing pulse insertion period by constituting the extraction circuit with a slice circuit slicing an upper level portion of a synchronizing signal, a horizontal synchronizing signal extraction circuit and an undesired pulse elimination circuit eliminating an undesired pulse with a narrow width. CONSTITUTION:A slice circuit 10 slices an upper portion waveform of a synchronizing signal having a tri-state pulse waveform. A horizontal synchronizing signal extraction circuit 20 eliminates an equalizing pulse included in the synchronizing signal extracted by the circuit 10 to extract the horizontal synchronizing signal having a regular horizontal synchronizing signal period. An undesired pulse elimination circuit 30 eliminates an undesired pulse with a narrow width caused at a front edge of the regular synchronizing signal and a front edge of the equalizing pulse for the equalizing pulse insertion period. The synchronizing signal extraction circuit consists of the circuits 20 and 30. The synchronizing signal extraction circuit extracts only the regular synchronizing signal even for the equalizing pulse period. Moreover, the use of the circuit is started with no adjustment.
-
公开(公告)号：JPH1164405A
公开(公告)日：1999-03-05
申请号：JP22347497
申请日：1997-08-20
Applicant: ADVANTEST CORP
Inventor： OGAMI TAKAYUKI
IPC: G01R23/173 , G01R29/06 , H04B1/707 , H04J13/00
Abstract: PROBLEM TO BE SOLVED: To provide a modulation analysis device and a spectrum analyzer capable of realizing the optimization of an input level even in the measured frequencies signals distributed in a wide band. SOLUTION: This device is provided with a means for detecting unknown power attenuation signals attenuated by an input attenuator 50, the means for increasing an attenuation amount in the case the unknown power level value is higher than a prescribed upper limit value first and reducing the attenuation amount in the case the unknown power level value is lower than a prescribed lower limit value secondly,the means for frequency-sweeping a section including the power measurement band of measured signals in an obtained attenuation range and the attenuation ranges before and after in a frequency conversion part 60, respectively measuring and calculating the power of the measured signals and performing setting and control to an optimum attenuation range from it and the means for controlling the gain of the variable gain amplifier 72 of an intermediate frequency linked with the setting of the attenuation range and gain-controlling the gain of the entire measurement system to a prescribed state.
-
Patent Agency Ranking
公开(公告)号：JPH0447896A
公开(公告)日：1992-02-18
申请号：JP15734290
申请日：1990-06-15
Applicant: ADVANTEST CORP
Inventor： OGAMI TAKAYUKI
Abstract: PURPOSE:To prevent the effect of shading from being caused onto a video signal by providing a changeover circuit to the device, which selects a video signal for a video signal period, selects a holding voltage by a sample-and-hold circuit and outputs the selected signal. CONSTITUTION:A rectangular wave PB is given to a changeover circuit 6 from a timing generating circuit 4, the changeover circuit 6 is switched to the position of a contact A when a rectangular PB is logical H and switched to the position of a contact B when a rectangular PB is logical L. A clock PC is given to a sample-and-hold circuit 3 from the circuit 4 and a DC level of a video signal at the start point of the video signal is sampled and held. Through the configuration above, a video signal is extracted from a signal extracted at an output terminal 5 from the changeover circuit 6 for the video signal period and a holding voltage of the circuit 3 is extracted for the synchronizing signal period. Through the configuration above, since a step difference is caused at the end of the video signal period, noise is measured from the start point of the video signal to the end point.
-
公开(公告)号：JPH0815358A
公开(公告)日：1996-01-19
申请号：JP17190994
申请日：1994-06-30
Applicant: ADVANTEST CORP
Inventor： OGAMI TAKAYUKI , KOIZUMI SATOSHI
Abstract: PURPOSE:To obtain an inexpensive self test method at an analog section by employing circuitry incorporating an instrument. CONSTITUTION:An offset control D/A 12 is set with such value as having true output value of OV, and a DC offset setting D/A 13 controls the output to OV at each level range according to a DC offset setting table every time when the measuring range is altered thus setting a maximum sensitivity for a variable amplifier 11. The resolution of 1LSB is then determined by taking measurements two times while setting OV at 0% and setting the offset control D/A 12 at first and second set values. The DC offset setting D/A 13 then delivers a value which does not exceed each range of the variable amplifier 11, and a control circuit 14 including a CPU reads out a measurement corresponding to a set true value from an A/D converter 6 thus checking the analog section over the full range thereof.
-
公开(公告)号：JPH04118518A
公开(公告)日：1992-04-20
申请号：JP23827090
申请日：1990-09-07
Applicant: ADVANTEST CORP
Inventor： OGAMI TAKAYUKI
Abstract: PURPOSE:To facilitate setting work by providing a transparent touch switch at every display section of small menu, and operating this switch to directly set each setting condition in the small menu. CONSTITUTION:By pushing operation of a transparent touch switch 40, a contact signal having assigned timing to the switch is input to an input port 14. A central processing unit 11 is informed the position of operated switch by timing of the input signal, the setting condition of small menu displayed on the position is looked up in a ROM 12, and written in the storage region of setting condition of a RAM 13. At changeover to measurement mode, a measuring device 20 is controlled with a controller 10 following to the setting condition written in the RAM 13, and operated following to the set measuring condition. Hereby, time required for setting of measuring condition can be shortened.
-
公开(公告)号：JPH0478272A
公开(公告)日：1992-03-12
申请号：JP18971590
申请日：1990-07-18
Applicant: ADVANTEST CORP
Inventor： OGAMI TAKAYUKI
Abstract: PURPOSE:To eliminate an offset voltage of a video signal without cancelling a fluctuation in terms of DC superimposed on the video signal by providing a video amplifier, and A/D converter, a mean value calculation device and a D/A converter to the controller. CONSTITUTION:A controller 12C shifts an accumulated data stored in a register 12B toward the low-order direction by one bit each by number of times corresponding to number of times of addition to execute the division. When a mean value data of a video signal by one frame is calculated, the data is stored in a register 14 and a D/A converter 13 inputs a DA-converted signal to an adder circuit 6 of an amplifier 2 as an offset data. The DC component of the video signal is cancelled by using a mean value data afterward by calculating the mean value of the video signal for beginning one frame only.
-
公开(公告)号：JPS62140518A
公开(公告)日：1987-06-24
申请号：JP28065285
申请日：1985-12-13
Applicant: ADVANTEST CORP
Inventor： YAMAGUCHI TAKAHIRO , ARAKAWA NORIO , OGAMI TAKAYUKI , OZAWA HIROMI
Abstract: PURPOSE:To suppress the increase of noise power, also to reduce modulation noise, and also to reduce each instantaneous quantizing error, by containing an offset voltage generating means for generating an offset voltage which is varied by an integer multiple or a non-integer multiple of a quantizing step of an A/D converter. CONSTITUTION:An offset voltage -O outputted from an offset voltage generating means 6 is added to a random noise N. The offset voltage -O is varied by + or -nq (n is an integer or a non-integer), in case when a quantizing step is denoted as (q). For instance, (n) is varied as +4, 0, -4, 0, +4..., and a period T0 of the variation is selected to a period of (m) times of a sampling period Ts in an A/D converter 1. A signal which has been A/D-converted by the A/D converter 1 is supplied to, for instance, a high speed Fourier transformation device 9, and in the high speed Fourier transformation device 9, a signal of a time area is converted to a signal of a frequency area, the signal of the frequency area is added and averaged in accordance with a time series in an average means 11, and a quantizing error is averaged.
-
-
-
-
-
-
-
-
Search Results
9
records
(took 0.04 seconds)
