AUTOMATIC ADJUSTMENT JIG FOR MCF VAPOR-DEPOSITION

    公开(公告)号:JPH09260986A

    公开(公告)日:1997-10-03

    申请号:JP7028696

    申请日:1996-03-26

    Applicant: ADVANTEST CORP

    Abstract: PROBLEM TO BE SOLVED: To provide the jig by which a characteristic is measured automatically for vapor-deposition amount control in the case of forming an electrode for a monolithic crystal filter(MCF). SOLUTION: The jig is provided with three connection terminals 22-24 connecting respectively to electrodes 2, 3 and a ground electrode of the monolithic crystal filter 10, a switch 25 to short-circuit the electrode 2 and the ground electrode 4, a switch 26 to short-circuit the electrode 3 and the ground electrode 4, external connection terminals 27-29 connecting respectively to the connection terminals 22-24, and a control interface 30 driving the switches in response to the control signal. A network analyzer having two equivalent systems of input terminals is used and the external connection terminals 27, 28 are connected respectively to the two systems of the input terminals of the network analyzer, the external connection terminal 29 is connected to a high frequency signal output terminal of the network analyzer and a control signal is outputted from a parallel input output port of the network analyzer.

    PIEZOELECTRIC RESONATOR MEASURING DEVICE

    公开(公告)号:JPH11142456A

    公开(公告)日:1999-05-28

    申请号:JP30239297

    申请日:1997-11-05

    Applicant: ADVANTEST CORP

    Inventor: WAKAMOTO SATORU

    Abstract: PROBLEM TO BE SOLVED: To selectively inspect a piezoelectric resonator (DUT) in the process before electrodes are formed by mounting one DUT piezoelectric face on a lower electrode, and measuring the transmission characteristic of the DUT in no contact between the other DUT piezoelectric face and an upper electrode. SOLUTION: A lower electrode 21 and an upper electrode 22 are connected to a transmission measuring device 50, a DUT formed with no electrode thin film is mounted on the lower electrode 21, and the transmission characteristic of the DUT is measured in no contact and at an electrically couplable prescribed proximity gap interval between the upper electrode 22 and the DUT. The series resonance frequency of the DUT is specified based on the amplitude transition of the measured transmission characteristic. There is the correlation of a fixed offset frequency between the obtained resonance frequency and the resonance frequency after the electrode thin film is formed, thus the correlation is obtained in advance for a quality judgment. The formation of useless electrodes on a defective DUT is resolved, and the application to an inclined conveying mechanism is facilitated.

    FREQUENCY SYNTHESIZER
    3.
    发明专利

    公开(公告)号:JPH10200403A

    公开(公告)日:1998-07-31

    申请号:JP34697

    申请日:1997-01-06

    Applicant: ADVANTEST CORP

    Abstract: PROBLEM TO BE SOLVED: To make an S/N high and to make a separating shield and an amplifier simple and inexpensive. SOLUTION: A variable frequency divider 12 undergoes frequency dividing of an output of a VCO 31; a frequency converter 33 converts the output into a low frequency with an output of a direct digital synthesizer 32; a comparator 13 performs phase comparison of the frequency conversion output with a reference signal of a reference oscillator 14; and the comparison output is supplied to the VCO 31 through a loop filter 15 to control the VCO 31. For instance, 30 to 100MHz signal outputs an oscillation output of the VCO 31 to an output terminal 24 through a switch 34, and 100kHz to 30MHz signal outputs from the DDS 32 to the terminal 24.

    PSEUDO LOCK PREVENTING METHOD FOR PHASE LOCKED LOOP OSCILLATOR

    公开(公告)号:JPH06197016A

    公开(公告)日:1994-07-15

    申请号:JP40105890

    申请日:1990-12-10

    Applicant: ADVANTEST CORP

    Abstract: PURPOSE:To set automatically a desired setting frequency to an actual setting frequency by deviating slightly the output of a synthesizer and detecting the change in a control signal, thereby deciding whether or not the state is a correct locking state. CONSTITUTION:While a desired setting frequency Fs (setting signal) is fixed at first, the frequency Fs of the output of a synthesizer 11 is changed slightly by DELTAf. Then a difference DELTAV between the control signal of a variable frequency oscillator 14 before the frequency is deviated by DELTAf and a control signal after the frequency is deviated by DELTAf is obtained. Then a factor f/DELTAf=M is calculated to obtain a degree M. Whether or not the degree M is equal to the degree N of a high frequency for which the oscillating frequency of the oscillator 14 is substantially locked corresponding to the desired setting frequency Fs is checked and when they are equal to each other, the state is set to a normal locking state. When not equal, the state is discriminated to be the pseudo locking state and the self-oscillating frequency of the oscillator 14 locked to the harmonic wave of the degree M, that is, the actual setting frequency FL is obtained based on the control signal VL of the oscillator 14 and the obtained degree M.

    SAMPLE-AND-HOLD CIRCUIT AND A/D CONVERTER USING SAME

    公开(公告)号:JPH0645937A

    公开(公告)日:1994-02-18

    申请号:JP19873792

    申请日:1992-07-24

    Applicant: ADVANTEST CORP

    Abstract: PURPOSE:To inexpensively manufacture a rapid sample-and-hold circuit and an A/D converter by supplying a sampled/held output to an output terminal by a switch by a switch for switching an input synchronously with a reference clock signal. CONSTITUTION:The frequency of a reference clock to be supplied from the external to a reference clock input terminal 108 is set up to frequency 4f to be four times of signal frequency (f) inputted to a signal input terminal 101. A frequency dividing circuit 105 divides the frequency of the reference clock into 1/2 frequency and outputs the divided frequency to a sample-and-hold amplifier 102 and a phase shifter 104. The phase shifter 104 shifts the phase of the input signal by 2pi/2 and output the phase-shifted signal to a sample-and-hold amplifier 103. Respective amplifiers 102, 103 execute the sample-and-hold operation of an input signal to the terminal 101 based on the outputs of the circuit 105 and the phase shifter 104. Since the operation of the amplifiers 102, 103 is shifted at their periods by 2pi/2, a signal appearing on an output terminal 109 and the output of an A/D converter 107 become signals with the same period as a reference clock necessary for oversampling corresponding to twice of normal sampling.

    PI CIRCUIT FIXTURE FOR MEASURING VIBRATOR

    公开(公告)号:JPH0961477A

    公开(公告)日:1997-03-07

    申请号:JP22122895

    申请日:1995-08-30

    Applicant: ADVANTEST CORP

    Abstract: PROBLEM TO BE SOLVED: To realize a π circuit fixture for measuring vibrators which is capable of measuring a vibrator requiring a load capacity easily and quickly. SOLUTION: This π circuit fixture 100 for measuring vibrators is provided with 1,101st and 2102nd π circuits connected to both ends of a vibrator 104 as object to be measured. A variable capacitance element D1 is provided between a connection terminal to which the vibrator is connected and either a first or second circuit, a capacitance decision means 103 to determine the capacitance of the variable capacitance element D1 and an insulating means between the variable capacitance means and the capacitance decision means to insulate the means on an AC basis or electrically.

    MEASURING APPARATUS FOR RESONATOR WITH CAPACITIVE LOAD

    公开(公告)号:JPH08271558A

    公开(公告)日:1996-10-18

    申请号:JP9790895

    申请日:1995-03-30

    Applicant: ADVANTEST CORP

    Abstract: PURPOSE: To obtain an apparatus for measuring the impedance characteristics and phase characteristics of a DUT (circuit element) regardless of the capacitance at I/O terminal. CONSTITUTION: The signal generator output terminal SG of an analyzer 200 is connected with the input terminal 101 of a DUT which is also connected with a reference amplitude/phase measuring terminal R. A differential amplifier circuit is formed by providing a differential amplifier 20 and a resistor R22. The DUT output terminal 102 is connected with the negative input terminal of the differential amplifier 20 having the positive input terminal connected with the circuit earth. The DUT output terminal 102 is set at virtual ground potential and the output terminal of the differential amplifier 20 is connected with the measuring input terminal A of the analyzer zoo.

    PHASE LOCKED LOOP CIRCUIT INCLUDING FREQUENCY CONVERTER

    公开(公告)号:JPH02246620A

    公开(公告)日:1990-10-02

    申请号:JP6815689

    申请日:1989-03-20

    Applicant: ADVANTEST CORP

    Inventor: WAKAMOTO SATORU

    Abstract: PURPOSE:To restore the output voltage of a phase comparator to a normal voltage region by detecting a fault of the operating state of a phase locked loop and interrupting tentatively the comparison of the phase comparator. CONSTITUTION:Since the increasing speed of an oscillating frequency of a VCO 16 is slower than the frequency change speed of a local oscillating signal source 14, the frequency of a signal FPG passes ahead an oscillating frequency f8 of the VCO 16 and the relation of the quantity of the frequency is reversed. Then a comparison output voltage Ec of a phase comparator 17 having a slope increasing positively changes to a slope decreasing negatively and finally the comparison output voltage Ec goes to a negative voltage. When the comparison output voltage Ec enters a negative voltage region, a voltage comparator 31 goes to an L logic and a flip-flop 33 inverts the state and outputs L logic to an output terminal Q to control a stop controller 40. Thus, the comparison output voltage Ec of the phase comparator 17 is restored to the positive polarity.

    ELECTRODE STRUCTURE FOR MEASURING FLATNESS OF RESONATOR BLANK WAFER

    公开(公告)号:JP2002228409A

    公开(公告)日:2002-08-14

    申请号:JP2001026581

    申请日:2001-02-02

    Applicant: ADVANTEST CORP

    Inventor: WAKAMOTO SATORU

    Abstract: PROBLEM TO BE SOLVED: To measure a resonance frequency in a plurality of places on a quarts blank without relatively moving an electrode and the quartz blank. SOLUTION: Pair electrodes 22a1, 22a2 to 22e1, 22e2 are distributed and formed on a measuring stage 21. The quartz blank 11 is arranged on the stage 21. The pair electrodes 22a1, 22a2 to 22e1, 22e2 are connected respectively to connecting electrodes 23a1, 23a2 to 23e1, 23e2 through respective through holes 24. Contact pins 26a1, 26a2 to 26e1, 26e2 are brought into contact with the electrodes 23a1, 23a2 to 23e1, 23e2. One pair electrode from among the pair electrodes is changed over by switches 28, 29 so as to be connected to a measuring device 14, and the resonance frequency of each part on the blank 11 is measured.

    METHOD OF CONTROLLING RESONATOR BLANK WAFER POLISHING DEVICE

    公开(公告)号:JP2002103221A

    公开(公告)日:2002-04-09

    申请号:JP2000299667

    申请日:2000-09-29

    Applicant: ADVANTEST CORP

    Inventor: WAKAMOTO SATORU

    Abstract: PROBLEM TO BE SOLVED: To obtain many effective measured signals by detecting a blank wafer under an electrode without fail. SOLUTION: A measured value of a frequency sweep initiation point is compared with a reference level (S1). If the measured value is small, a frequency sweep is reset (S10). If the measured value is large, the frequency sweep is continued (S3), and a specified level lower than a level of the measured signal obtained by the frequency sweep is set as the next reference level (S6).

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