公开(公告)号：JP2000138578A

公开(公告)日：2000-05-16

申请号：JP14619499

申请日：1999-05-26

Applicant: ANALOG DEVICES INC

Inventor： SINGH JASPREET ,  KOKER GREGORY T ,  NEWMAN MARK R

IPC: H03K17/10 ,  G06F13/40 ,  H03K19/003 ,  H03K19/0175

Abstract: PROBLEM TO BE SOLVED: To provide an input-output driver circuit which has both a high voltage withstand property and extensibility and which needs only two power supply pins. SOLUTION: The power supply pins required for an input-output circuit are only two pins 38 and 42 while a high voltage withstand property and extensibility are achieved by providing a buffer interface between a functional digital circuit and a common bus for another digital circuit by using two PMOS switching transistors T1A and T1B instead of one PMOS switching transistor between the output line 30 of the circuit and an output power terminal 42. For turning off the transistors T1A and T1B, the voltage of an output power source 40 is applied to the gate of one transistor T1A or T1B and the voltage at the output line 30 is applied to the gate of the other transistor T1B or T1A. Consequently, at least one of the transistors T1A and T1B can be surely turned off as required regardlessly whether or not the voltage at the output line 30 exceeds the voltage level at the output power terminal 42.

公开(公告)号：JP2002141793A

公开(公告)日：2002-05-17

申请号：JP2001270596

申请日：2001-09-06

Applicant: ANALOG DEVICES INC

Inventor： SINGH JASPREET ,  KOKER GREGORY T ,  NEWMAN MARK R

IPC: H03K17/10 ,  G06F13/40 ,  H03K19/003 ,  H03K19/0175

Abstract: PROBLEM TO BE SOLVED: To provide an input output driver circuit that has both high level voltage tolerance and extensibility and has only two power supply pins. SOLUTION: The input output driver circuit employs two PMOS switching transistors (T1A, T1B) between an output line (30) of the circuit and an output power terminal (42) instead of one transistor to provide a buffer interface between a functional digital circuit (14) and a common bus (18) for other digital circuits and uses only the two required power pins (38, 42) while attaining high level voltage tolerance and the extensibility. Applying a voltage of an output power supply (40) to one-side gates of the transistors and the output line voltage to the other gates switches off the transistors. Thus, at least either of the transistors is surely turned off as required at maximum independently of whether or not the output line voltage exceeds the output power level.

公开(公告)号：DE69934048D1

公开(公告)日：2007-01-04

申请号：DE69934048

申请日：1999-05-17

Applicant: ANALOG DEVICES INC

Inventor： SINGH JASPREET ,  KOKER GREGORY T ,  NEWMAN MARK R

IPC: G06F13/40 ,  H03K17/10 ,  H03K19/003 ,  H03K19/0175

Abstract: An input/output driver circuit which provides a buffer interface between a functional digital circuit (14) and a common bus (18) for other digital circuits achieves high levels of voltage tolerance and compliance, while requiring only two power supply pins (38,42), by using two PMOS switching transistors (T1A,T1B) between the circuit's output line (30) and an output power supply terminal(42), rather than only one. To turn the transistors OFF, the output power supply (40) voltage is applied to the gate of one of them and the output line voltage to the gate of the other. This assures that at least one of the transistors is fully OFF when desired, whether or not the output line voltage exceeds the output power supply level.

公开(公告)号：DE69934048T2

公开(公告)日：2007-05-10

申请号：DE69934048

申请日：1999-05-17

Applicant: ANALOG DEVICES INC

Inventor： SINGH JASPREET ,  KOKER GREGORY T ,  NEWMAN MARK R

IPC: G06F13/40 ,  H03K17/10 ,  H03K19/003 ,  H03K19/0175

Abstract: An input/output driver circuit which provides a buffer interface between a functional digital circuit (14) and a common bus (18) for other digital circuits achieves high levels of voltage tolerance and compliance, while requiring only two power supply pins (38,42), by using two PMOS switching transistors (T1A,T1B) between the circuit's output line (30) and an output power supply terminal(42), rather than only one. To turn the transistors OFF, the output power supply (40) voltage is applied to the gate of one of them and the output line voltage to the gate of the other. This assures that at least one of the transistors is fully OFF when desired, whether or not the output line voltage exceeds the output power supply level.