公开(公告)号：AU2011338863B2

公开(公告)日：2015-01-22

申请号：AU2011338863

申请日：2011-11-17

Applicant: APPLE INC

Inventor： DE CESARE JOSH P ,  WADHAWAN RUCHI ,  MACHNICKI ERIK P ,  HAYTER MARK D

IPC: G06F13/24

Abstract: In one embodiment, an interrupt controller may implement an interrupt distribution scheme for distributing interrupts among multiple processors. The scheme may take into account various processor state in determining which processor should receive a given interrupt. For example, the processor state may include whether or not the processor is in a sleep state, whether or not interrupts are enabled, whether or not the processor has responded to previous interrupts, etc. The interrupt controller may implement timeout mechanisms to detect that an interrupt is being delayed (e.g. after being offered to a processor). The interrupt may be re-evaluated at the expiration of a timeout, and potentially offered to another processor. The interrupt controller may be configured to automatically, and atomically, mask an interrupt in response to delivering an interrupt vector for the interrupt to a responding processor.

公开(公告)号：AU2011338863A1

公开(公告)日：2013-05-09

申请号：AU2011338863

申请日：2011-11-17

Applicant: APPLE INC

Inventor： DE CESARE JOSH P ,  WADHAWAN RUCHI ,  MACHNICKI ERIK P ,  HAYTER MARK D

IPC: G06F13/24

Abstract: In one embodiment, an interrupt controller may implement an interrupt distribution scheme for distributing interrupts among multiple processors. The scheme may take into account various processor state in determining which processor should receive a given interrupt. For example, the processor state may include whether or not the processor is in a sleep state, whether or not interrupts are enabled, whether or not the processor has responded to previous interrupts, etc. The interrupt controller may implement timeout mechanisms to detect that an interrupt is being delayed (e.g. after being offered to a processor). The interrupt may be re-evaluated at the expiration of a timeout, and potentially offered to another processor. The interrupt controller may be configured to automatically, and atomically, mask an interrupt in response to delivering an interrupt vector for the interrupt to a responding processor.

公开(公告)号：BR112013013300A2

公开(公告)日：2016-09-13

申请号：BR112013013300

申请日：2011-11-17

Applicant: APPLE INC

Inventor： MACHNICKI ERIK P ,  CESARE JOSH P DE ,  HAYTER MARK D ,  WADHAWAN RUCHI

IPC: G06F13/24