-
公开(公告)号：JP2020092416A
公开(公告)日：2020-06-11
申请号：JP2019204036
申请日：2019-11-11
Applicant: APPLE INC
Inventor： CARLO DI NALLO , SIMONE PAULOTTO
Abstract: 【課題】外部オブジェクトとの間の距離を特定できる電子デバイスを提供する。【解決手段】電子デバイス10は、制御回路及び無線回路を備える。無線回路は、フェーズドアンテナアレイ48と、送信及び受信ポートを有する高周波集積回路とを含む。フェーズドアンテナアレイ48は、送信ポートに結合された積層パッチアンテナの第1のセットと、受信ポートに結合された積層パッチアンテナの第2のセットとを含む。集積回路は、送信ポート及び積層パッチアンテナの第1のセットを使用してミリ波周波数で測距信号54を送信する。集積回路は、受信ポート及び積層パッチアンテナの第2のセットを使用して、外部オブジェクト50からの反射信号56を受信する。制御回路は、測距信号54及び反射信号56に基づいて、電子デバイス10と外部オブジェクト50との間の距離を特定する。【選択図】図6
-
公开(公告)号：GB2573882A
公开(公告)日：2019-11-20
申请号：GB201905041
申请日：2019-04-09
Applicant: APPLE INC
Inventor： HAO XU , RODNEY ANDRES GOMEZ ANGULO , SIWEN YONG , MATTHEW A MOW , MATTIA PASCOLINI , JENNIFER M EDWARDS , HARISH RAJAGOPALAN , SIMONE PAULOTTO , BILGEHAN AVSER
Abstract: A millimetre wave electronic communication device 10 comprises a dielectric cover layer, a dielectric substrate having a surface mounted against the dielectric cover layer, and a phased antenna array on the dielectric substrate wherein the phased antenna array comprises conductive traces. The phased antenna array is configured to transmit radio-frequency signals between 10 GHz – 300 GHz. A second aspect comprises the dielectric cover layer forming a quarter wave impedance transformer. A third aspect comprises a plurality of conductive trace antennas attached to the dielectric housing wall and a fence of conductive vias extending through the substrate, laterally surrounding each antenna trace. The phased arrays may comprise patch elements and parasitic elements.
-
公开(公告)号：GB2573882B
公开(公告)日：2022-09-21
申请号：GB201905041
申请日：2019-04-09
Applicant: APPLE INC
Inventor： HAO XU , RODNEY ANDRES GOMEZ ANGULO , SIWEN YONG , MATTHEW A MOW , MATTIA PASCOLINI , JENNIFER M EDWARDS , HARISH RAJAGOPALAN , SIMONE PAULOTTO , BILGEHAN AVSER
Abstract: An electronic device may be provided with a dielectric cover layer, a dielectric substrate, and a phased antenna array on the dielectric substrate for conveying millimeter wave signals through the dielectric cover layer. The array may include conductive traces mounted against the dielectric layer. The conductive traces may form patch elements or parasitic elements for the phased antenna array. The dielectric layer may have a dielectric constant and a thickness selected to form a quarter wave impedance transformer for the array at a wavelength of operation of the array. The substrate may include fences of conductive vias that laterally surround each of the antennas within the array. When configured in this way, signal attenuation, destructive interference, and surface wave generation associated with the presence of the dielectric layer over the phased antenna array may be minimized.
-
-
Search Results
3
records
(took 0.021 seconds)
