Abstract:
The described embodiments relate generally to computing devices including liquid crystal displays (LCDs) and more particularly to methods for attaching a backlight assembly to a cover glass layer while minimizing an amount of stress transferred through the cover glass layer to the LCD module. A continuous and compliant foam adhesive can be used to bond the cover glass layer to the backlight assembly. The compliant bond can absorb and distribute local stress concentrations caused by structural loads, mismatched surfaces and differing thermal expansion rates between various structures and cover glass layer. This can reduce stress concentrations in the cover glass layer that can lead to stress induced birefringence in the LCD cell. In another embodiment, a series of rigid plates can be bonded to the cover glass layer and attached to the backlight assembly. Point loads applied from the backlight assembly can be distributed over a larger area due to the resilience of the rigid plates.
Abstract:
Interconnect devices are described. In some examples, an interconnect device can be aligned in a first plane and can include a printed circuit board having a tongue portion and a pin portion. The pin portion can include a plurality of pins extending away from the printed circuit board. The interconnect device can be configured to electrically couple with a main logic board aligned in a second plane. In particular, the plurality of pins can be inserted into corresponding electrical contact locations within the main logic board to form a biplanar connection. The biplanar connection can be made in way that minimizes signal loss for high speed data transfers.
Abstract:
Interconnect devices are described. In some examples, an interconnect device can be aligned in a first plane and can include a printed circuit board having a tongue portion and a pin portion. The pin portion can include a plurality of pins extending away from the printed circuit board. The interconnect device can be configured to electrically couple with a main logic board aligned in a second plane. In particular, the plurality of pins can be inserted into corresponding electrical contact locations within the main logic board to form a biplanar connection. The biplanar connection can be made in way that minimizes signal loss for high speed data transfers.