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    INTERRUPT DISTRIBUTION SCHEME
    1.
    发明申请
    INTERRUPT DISTRIBUTION SCHEME 审中-公开
    中断分配方案

    公开(公告)号：WO2012078334A1

    公开(公告)日：2012-06-14

    申请号：PCT/US2011/061197

    申请日：2011-11-17

    Applicant: APPLE INC. ,  DE CESARE, Josh P. ,  WADHAWAN, Ruchi ,  MACHNICKI, Erik P. ,  HAYTER, Mark D.

    Inventor： DE CESARE, Josh P. ,  WADHAWAN, Ruchi ,  MACHNICKI, Erik P. ,  HAYTER, Mark D.

    IPC: G06F13/24

    CPC classification number: G06F13/24 ,  G06F2213/2424 ,  Y02D10/14

    Abstract: In one embodiment, an interrupt controller may implement an interrupt distribution scheme for distributing interrupts among multiple processors. The scheme may take into account various processor state in determining which processor should receive a given interrupt. For example, the processor state may include whether or not the processor is in a sleep state, whether or not interrupts are enabled, whether or not the processor has responded to previous interrupts, etc. The interrupt controller may implement timeout mechanisms to detect that an interrupt is being delayed (e.g. after being offered to a processor). The interrupt may be re-evaluated at the expiration of a timeout, and potentially offered to another processor. The interrupt controller may be configured to automatically, and atomically, mask an interrupt in response to delivering an interrupt vector for the interrupt to a responding processor.

    Abstract translation: 在一个实施例中，中断控制器可以实现用于在多个处理器之间分配中断的中断分配方案。 该方案可以考虑在确定哪个处理器应该接收给定中断时的各种处理器状态。 例如，处理器状态可以包括处理器是否处于休眠状态，中断是否被使能，处理器是否响应先前的中断等。中断控制器可以实现超时机制以检测到 中断被延迟（例如，在提供给处理器之后）。 中断可能会在超时到期时重新评估，并可能提供给另一个处理器。 中断控制器可以被配置为自动并原子地屏蔽中断，以响应于将中断的中断向量传递给响应处理器。

    POWER-UP RESTRICTION
    3.
    发明申请
    POWER-UP RESTRICTION 审中-公开
    上电限制

    公开(公告)号：WO2014113466A1

    公开(公告)日：2014-07-24

    申请号：PCT/US2014/011673

    申请日：2014-01-15

    Applicant: APPLE INC.

    Inventor： KEIL, Shane J. ,  MACHNICKI, Erik P. ,  DE CESARE, Josh P.

    IPC: G06F1/32

    CPC classification number: G06F1/3234 ,  G06F1/3203

    Abstract: Techniques are disclosed relating to power management within an integrated circuits. In one embodiment an apparatus is disclosed that includes a circuit and a power management unit. The power management unit is configured to provide, based on a programmable setting, an indication of whether an attempted communication to the circuit is permitted to cause the circuit to exit from a power-managed state. In some embodiments, the apparatus includes a fabric configured to transmit the attempted communication to the circuit from a device. In such an embodiment, the circuit is configured to exit the power-managed state in response to receiving the attempted communication. The fabric is configured to determine whether to transmit the attempted communication based on the indication provided by the power management unit.

    Abstract translation: 公开了与集成电路内的电力管理有关的技术。 在一个实施例中，公开了一种包括电路和电源管理单元的装置。 功率管理单元被配置为基于可编程设置来提供是否允许对电路的尝试通信是使电路退出功率管理状态的指示。 在一些实施例中，该装置包括被配置成从设备将尝试的通信传送到电路的结构。 在这样的实施例中，电路被配置为响应于接收到尝试的通信而退出功率管理状态。 结构被配置为基于由电力管理单元提供的指示来确定是否发送尝试的通信。

    COORDINATING PERFORMANCE PARAMETERS IN MULTIPLE CIRCUITS
    4.
    发明申请
    COORDINATING PERFORMANCE PARAMETERS IN MULTIPLE CIRCUITS 审中-公开
    在多个电路中协调性能参数

    公开(公告)号：WO2012096835A1

    公开(公告)日：2012-07-19

    申请号：PCT/US2012/020440

    申请日：2012-01-06

    Applicant: APPLE INC. ,  MACHNICKI, Erik P. ,  MILLET, Timothy J. ,  DE CESARE, Josh P.

    Inventor： MACHNICKI, Erik P. ,  MILLET, Timothy J. ,  DE CESARE, Josh P.

    IPC: G01K1/08

    CPC classification number: G06F1/3203 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/171 ,  Y02D10/172

    Abstract: Systems and methods for coordinating performance parameters in multiple domains are described. In an embodiment, a method includes receiving a request to change a state of an electronic circuit, where the circuit includes a first domain and a second domain, causing a first parameter of a first circuit serving the first domain to be modified to a first modified parameter based on the request, and causing a second parameter of a second circuit serving the second domain to be modified to a second modified parameter based on the request. In some cases, a parameter may include a clock frequency. In other cases, a parameter may include a voltage. In some embodiments, a system may be implemented as a logic circuit and/or as a system-on-a-chip (SoC). Devices suitable for using these systems include, for example, desktop and laptop computers, tablets, network appliances, mobile phones, personal digital assistants, e-book readers, televisions, and game consoles.

    Abstract translation: 描述用于协调多个域中的性能参数的系统和方法。 在一个实施例中，一种方法包括接收改变电子电路的状态的请求，其中电路包括第一域和第二域，使得服务于第一域的第一电路的第一参数被修改为第一修改 参数，并且基于该请求，使服务于第二域的第二电路的第二参数被修改为第二修改参数。 在某些情况下，参数可以包括时钟频率。 在其他情况下，参数可以包括电压。 在一些实施例中，系统可以被实现为逻辑电路和/或作为片上系统（SoC）。 适用于这些系统的设备包括例如台式和膝上型计算机，平板电脑，网络设备，移动电话，个人数字助理，电子书阅读器，电视机和游戏机。

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