Abstract:
A system that includes a regulator unit is disclosed. The regulator unit includes first and second phase units whose outputs are coupled to through first and second coupled inductors, respectively, to a power supply node of a circuit block. The first phase unit may be configured to discharge, for a first period of time, the power supply node through the first inductor in response to determining a sense current is greater than a demand current. The operation of the second phase unit may follow that of the first phase unit after a second period of time has elapsed.
Abstract:
A voltage regulator circuit included in a computer system may include multiple phase circuits each coupled to a regulated power supply node via a corresponding inductor. The phase circuits may modify a voltage level of the regulated power supply node using respective control signals generated by a digital control circuit that processes multiple data bits. An analog-to-digital converter circuit may compare the voltage level of the regulated power supply node to multiple reference voltage levels and sample the resultant comparisons to generate the multiple data bits.
Abstract:
A system (100) that includes a regulator (101) unit is disclosed. The regulator unit (200) includes first and second phase units (201a, 201b) whose outputs are coupled to a common output node (204). Each of the phase units (201a, 201b,...) may be configured to source current to the output node in response to the assertion of a respective clock signal (208a, 208b,...) in order to generate a regulated supply voltage (204). Each phase unit (201a, 201b,...) includes a respective transconductance amplifier (301) configured to generate a respective demand current (314) dependent upon a reference voltage (207) and the regulated supply voltage (204).
Abstract:
A system (100) that includes a regulator circuit (101) is disclosed. The regulator circuit includes first (201a) and second (201b) phase units whose outputs are coupled to a power supply node (204) of a circuit block, via respective coupled inductors (211a, 211b). The first phase unit (201a) may initiate a charge cycle of the power supply node in response to assertion of a clock signal (208a) and generate a compensated current using currents measure (507, 508) through both inductors and the clock signal (208a). In response to a determination that the compensated current is greater than a demand current (210) generated using a voltage level of the power supply node and a reference voltage, the first phase unit may halt the charge cycle.
Abstract:
An apparatus is disclosed, including a driver circuit, a comparator circuit, and a counter circuit. The driver circuit may be configured to source a current to a load circuit. The comparator circuit may be configured to perform a comparison of a reference voltage to a voltage across the load circuit. The counter circuit may be configured to modify a digital count value based on the comparison. The driver circuit may be further configured to adjust a value of the current using the digital count value.