公开(公告)号：WO2017136112A1

公开(公告)日：2017-08-10

申请号：PCT/US2017/012942

申请日：2017-01-11

Applicant: APPLE INC.

Inventor： DIBENE, Joseph T. ,  HARTLEY, David A. ,  SODHI, Inder M.

IPC: G06F1/32 ,  G06F9/38

CPC classification number: G06F1/3296 ,  G06F1/3237 ,  G06F1/324 ,  G06F9/3869 ,  Y02D10/128 ,  Y02D10/172

Abstract: In one embodiment, an integrated circuit includes a power management architecture in which one or more pipelines are actively powered and clocked when data is provided for processing, but which are clock gated and in retention when there is no data to be processed. When data is provided to the pipeline, supply voltage may be actively provided to initial stages of the pipeline and the clocks may be ungated when the voltage is stable enough for operation. Subsequent stages of the pipeline may be sequentially provided power and clocks as the data progresses through the pipeline. Initial stages may be clock gated and power may be deactivated when additional data is not provided for processing. Accordingly, when the pipeline is viewed as a whole, power may be seen as rolling forward ahead of the data processing, and power may be inhibited in a similar rolling fashion.

Abstract translation: 在一个实施例中，集成电路包括电源管理体系结构，其中当数据被提供用于处理时，一个或多个管线被主动地供电并且被提供时钟，但是当时钟门控 要处理的数据。 当数据提供给流水线时，电源电压可以被主动地提供给流水线的初始阶段，并且当电压足够稳定以用于操作时，时钟可以不被调整。 流水线的后续阶段可随着数据通过流水线而顺序地提供功率和时钟。 当未提供用于处理的附加数据时，初始阶段可以被时钟门控并且可以停用电源。 因此，当整个管道被看作是一个整体时，在数据处理之前，功耗可能会被视为向前滚动，并且可能以类似的滚动方式抑制功耗。