METHOD AND APPARATUS FOR DIGITAL UNDERVOLTAGE DETECTION AND CONTROL
    1.
    发明申请
    METHOD AND APPARATUS FOR DIGITAL UNDERVOLTAGE DETECTION AND CONTROL 审中-公开
    用于数字低电压检测和控制的方法和装置

    公开(公告)号:WO2017127269A1

    公开(公告)日:2017-07-27

    申请号:PCT/US2017/013016

    申请日:2017-01-11

    Applicant: APPLE INC.

    Abstract: A method and apparats for undervoltage detection and correction is disclosed. An IC includes sensors implemented in various functional circuit blocks. The sensors are implemented using ring oscillators, and may be characterized by a polynomial. The sensors are used to monitor a supply voltage provided to a corresponding functional unit. The sensors provide information indicative of the voltage on the supply voltage node over successive clock cycles. Comparison circuitry may be used to compare the detected voltage to one or more voltage thresholds, while delta comparison circuitry may be used to determine a slope, or rate of change of the voltage. Based on comparisons performed by the comparison circuitry and the delta comparison circuitry, control circuitry may determine if one or more voltage correction actions are to be taken in order to bring the voltage on the supply node into a specified range.

    Abstract translation: 公开了一种用于欠压检测和校正的方法和装置。 IC包括用各种功能电路模块实现的传感器。 传感器使用环形振荡器来实现,并且可以用多项式来表征。 传感器用于监视提供给相应功能单元的电源电压。 传感器提供指示连续时钟周期内电源电压节点上的电压的信息。 比较电路可以用于将检测到的电压与一个或多个电压阈值进行比较,而增量比较电路可以用于确定电压的斜率或变化率。 基于由比较电路和增量比较电路执行的比较,控制电路可以确定是否要采取一个或多个电压校正动作以使电源节点上的电压进入指定范围。

    SYSTEMS AND METHODS FOR COHERENT POWER MANAGEMENT

    公开(公告)号:WO2018148665A1

    公开(公告)日:2018-08-16

    申请号:PCT/US2018/017834

    申请日:2018-02-12

    Applicant: APPLE, INC.

    Abstract: In an embodiment, a system includes multiple power management mechanism operating in different time domains (e.g. with different bandwidths) and control circuitry that is configured to coordinate operation of the mechanisms. If one mechanism is adding energy to the system, for example, the control circuitry may inform another mechanism that the energy is coming so that the other mechanism may not take as drastic an action as it would if no energy were coming. If a light workload is detected by circuitry near the load, and there is plenty of energy in the system, the control circuitry may cause the power management unit (PMU) to generate less energy or even temporarily turn off. A variety of mechanisms for the coordinated, coherent use of power are described.

    POWER MANAGEMENT ARCHITECTURE
    4.
    发明申请
    POWER MANAGEMENT ARCHITECTURE 审中-公开
    电源管理架构

    公开(公告)号:WO2017136112A1

    公开(公告)日:2017-08-10

    申请号:PCT/US2017/012942

    申请日:2017-01-11

    Applicant: APPLE INC.

    Abstract: In one embodiment, an integrated circuit includes a power management architecture in which one or more pipelines are actively powered and clocked when data is provided for processing, but which are clock gated and in retention when there is no data to be processed. When data is provided to the pipeline, supply voltage may be actively provided to initial stages of the pipeline and the clocks may be ungated when the voltage is stable enough for operation. Subsequent stages of the pipeline may be sequentially provided power and clocks as the data progresses through the pipeline. Initial stages may be clock gated and power may be deactivated when additional data is not provided for processing. Accordingly, when the pipeline is viewed as a whole, power may be seen as rolling forward ahead of the data processing, and power may be inhibited in a similar rolling fashion.

    Abstract translation: 在一个实施例中,集成电路包括电源管理体系结构,其中当数据被提供用于处理时,一个或多个管线被主动地供电并且被提供时钟,但是当时钟门控 要处理的数据。 当数据提供给流水线时,电源电压可以被主动地提供给流水线的初始阶段,并且当电压足够稳定以用于操作时,时钟可以不被调整。 流水线的后续阶段可随着数据通过流水线而顺序地提供功率和时钟。 当未提供用于处理的附加数据时,初始阶段可以被时钟门控并且可以停用电源。 因此,当整个管道被看作是一个整体时,在数据处理之前,功耗可能会被视为向前滚动,并且可能以类似的滚动方式抑制功耗。

Patent Agency Ranking