公开(公告)号：WO2021025987A1

公开(公告)日：2021-02-11

申请号：PCT/US2020/044464

申请日：2020-07-27

Applicant: APPLE INC.

Inventor： KLINGAUF, Wolfgang H. ,  CHEUNG, Connie W. ,  GUPTA, Rohit K. ,  NATARAJAN, Rohit ,  HEPPOLETTE, Vanessa Cristina ,  LINGUTLA, Varaprasad V. ,  KANCHANA, Muditha

IPC: G06F12/0895 ,  G06F12/0877 ,  G06F12/0893

Abstract: Systems, apparatuses, and methods for dynamically partitioning a memory cache among a plurality of agents are described. A system includes a plurality of agents, a communication fabric, a memory cache, and a lower-level memory. The partitioning of the memory cache for the active data streams of the agents is dynamically adjusted to reduce memory bandwidth and increase power savings across a wide range of applications. A memory cache driver monitors activations and characteristics of the data streams of the system. When a change is detected, the memory cache driver dynamically updates the memory cache allocation policy and quotas for the agents. The quotas specify how much of the memory cache each agent is allowed to use. The updates are communicated to the memory cache controller to enforce the new policy and enforce the new quotas for the various agents accessing the memory.

公开(公告)号：WO2013036639A1

公开(公告)日：2013-03-14

申请号：PCT/US2012/053963

申请日：2012-09-06

Applicant: APPLE INC. ,  MILLET, Timothy J. ,  KANCHANA, Muditha ,  DESAI, Shailendra S.

Inventor： MILLET, Timothy J. ,  KANCHANA, Muditha ,  DESAI, Shailendra S.

IPC: G06F15/17

CPC classification number: G06F13/4022 ,  Y02D10/14 ,  Y02D10/151

Abstract: A system, apparatus, and method for routing traffic in a SoC from I/O devices to memory. A coherence switch routes coherent traffic through a coherency port on a processor complex to a real-time port of a memory controller. The coherence switch routes non-coherent traffic to a non-real time port of the memory controller. The coherence switch can also dynamically switch traffic between the two paths. The routing of traffic can be configured via a configuration register, and while software can initiate an update to the configuration register, the actual coherence switch hardware will implement the update. Software can write to a software-writeable copy of the configuration register to initiate an update to the flow path to memory for a transaction identifier. The coherence switch detects the update to the software-writeable copy, and then the coherence switch updates the working copy of the configuration register and implements the new routing.

Abstract translation: 用于将SoC中的业务从I / O设备路由到存储器的系统，装置和方法。 相干切换器将相干流量通过处理器复合体上的一致端口路由到存储器控制器的实时端口。 相干切换将非相干流量路由到存储器控制器的非实时端口。 相干切换器还可以动态地切换两条路径之间的流量。 流量路由可以通过配置寄存器配置，而软件可以启动对配置寄存器的更新，实际的相干交换机硬件将实现更新。 软件可以写入配置寄存器的可写入软件的副本，以启动对事务标识符的存储器流程的更新。 相干开关检测到软件可写入副本的更新，然后相干开关更新配置寄存器的工作副本并实现新的路由。