公开(公告)号：CA2105107C

公开(公告)日：1999-01-19

申请号：CA2105107

申请日：1993-08-30

Applicant: ATI TECHNOLOGIES INC

Inventor： SETO JIM M N ,  COLBECK ROGER P ,  CHAU RAYMOND ,  LEUNG SIMON C F

IPC: H03L7/089 ,  H03L7/093 ,  H03L7/099 ,  H03L7/18 ,  H03L7/16 ,  H03H11/02 ,  H03H11/40

Abstract: A voltage to current converter is formed of a first current steering mirror which includes first binary weighted current mirror transistors and receives an input voltage signal and converts it to an output current. The converter also is formed of a second current mirror which generates a selectable output current, the second current mirror being formed of second binary weighted current mirror transistors. The output currents of the first current steering mirror and second current mirror are added and the sum is provided to the control input of a current controlled oscillator which can be used in a phase locked loop.

公开(公告)号：CA2105107A1

公开(公告)日：1994-12-24

申请号：CA2105107

申请日：1993-08-30

Applicant: ATI TECHNOLOGIES INC

Inventor： SETO JIM M N ,  COLBECK ROGER P ,  CHAU RAYMOND ,  LEUNG SIMON C F

IPC: H03L7/089 ,  H03L7/093 ,  H03L7/099 ,  H03L7/18 ,  H03L7/16 ,  H03H11/02 ,  H03H11/40

Abstract: A voltage to current converter is formed of a first current steering mirror which includes first binary weighted current mirror transistors and receives an input voltage signal and converts it to an output current. The converter also is formed of a second current mirror which generates a selectable output current, the second current mirror being formed of second binary weighted current mirror transistors. The output currents of the first current steering mirror and second current mirror are added and the sum is provided to the control input of a current controlled oscillator which can be used in a phase locked loop.

公开(公告)号：CA2214221C

公开(公告)日：2000-06-06

申请号：CA2214221

申请日：1997-08-28

Applicant: ATI TECHNOLOGIES INC

Inventor： CHOW HUGH ,  AHDAB AHMAD ,  CHAU RAYMOND

IPC: H03K3/03 ,  H03L7/099

Abstract: A voltage controlled oscillator comprising: a ring of inverters comprised of an odd number of serially connected CMOS inverter stages, the inverter stages being connected between first and second oppositely poled power leads, a MOSFET having a source-drain circuit connected between one of the power leads and a first power rail, the other power lead being connected to a second power rail, apparatus for operating the MOSFET in saturation, and apparatus for applying a control voltage to the gate of the MOSFET, referenced to the second power lead, whereby the MOSFET operates as a nonlinear current conduction device having a characteristic such as to linearize the voltage-frequency characteristic of the combined MOSFET - ring oscillator combination.

公开(公告)号：CA2214221A1

公开(公告)日：1998-08-24

申请号：CA2214221

申请日：1997-08-28

Applicant: ATI TECHNOLOGIES INC

Inventor： AHDAB AHMAD ,  CHOW HUGH ,  CHAU RAYMOND

IPC: H03K3/03 ,  H03L7/099

Abstract: A voltage controlled oscillator comprising: a ring of inverters comprised of an odd number of serially connected CMOS inverter stages, the inverter stages being connected between first and second oppositely poled power leads, a MOSFET having a source-drain circuit connected between one of the power leads and a first power rail, the other power lead being connected to a second power rail, apparatus for operating the MOSFET in saturation, and apparatus for applying a control voltage to the gate of the MOSFET, referenced to the second power lead, whereby the MOSFET operates as a nonlinear current conduction device having a characteristic such as to linearize the voltage-frequency characteristic of the combined MOSFET-ring oscillator combination.

公开(公告)号：CA2166353A1

公开(公告)日：1996-07-01

申请号：CA2166353

申请日：1995-12-29

Applicant: ATI TECHNOLOGIES INC

Inventor： CHAU RAYMOND

IPC: H03K3/03 ,  H03L7/00

Abstract: A voltage controlled oscillator comprised of a current controlled oscillator formed of a loop of serially connected inverters, the oscillator having a primary output at an output of one of the inverters for providing a primary pulse signal and a secondary output at the output of another inverter spaced from the one inverter by an odd number of inverters for providing a secondary pulse signal which is in antiphase to the primary pulse signal, apparatus for receiving the primary and secondary pulse signals and for providing an output signal which indicates the presence of a rising or falling edge to a corresponding primary or secondary pulse signal during a transmission time delay provided by the odd number of inverters.

公开(公告)号：CA2105106A1

公开(公告)日：1994-12-24

申请号：CA2105106

申请日：1993-08-30

Applicant: ATI TECHNOLOGIES INC

Inventor： SETO JIM M N ,  COLBECK ROGER P ,  CHAU RAYMOND ,  LEUNG SIMON C F

IPC: H03L7/089 ,  H04L7/033 ,  H03L7/16

Abstract: A phase locked loop is comprised of a phase-frequency detector for providing to a charge pump up and down pulse signals having pulse widths proportional to phase differences between a pair of signals applied thereto, apparatus for introducing a relative phase difference between a first clock signal and a second signal to provide the pair of signals, the second signal being synchronized with an output signal of the loop, apparatus for providing a third up or down signal to the charge pump offsetting the effect of the introduced phase difference, and apparatus for obtaining a loop control voltage from the charge pump.