Phase-Offset Cancellation Technique for Reducing Low Frequency Jitter

    公开(公告)号:CA2105106A1

    公开(公告)日:1994-12-24

    申请号:CA2105106

    申请日:1993-08-30

    Abstract: A phase locked loop is comprised of a phase-frequency detector for providing to a charge pump up and down pulse signals having pulse widths proportional to phase differences between a pair of signals applied thereto, apparatus for introducing a relative phase difference between a first clock signal and a second signal to provide the pair of signals, the second signal being synchronized with an output signal of the loop, apparatus for providing a third up or down signal to the charge pump offsetting the effect of the introduced phase difference, and apparatus for obtaining a loop control voltage from the charge pump.

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