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公开(公告)号:CA2105106A1
公开(公告)日:1994-12-24
申请号:CA2105106
申请日:1993-08-30
Applicant: ATI TECHNOLOGIES INC
Inventor: SETO JIM M N , COLBECK ROGER P , CHAU RAYMOND , LEUNG SIMON C F
Abstract: A phase locked loop is comprised of a phase-frequency detector for providing to a charge pump up and down pulse signals having pulse widths proportional to phase differences between a pair of signals applied thereto, apparatus for introducing a relative phase difference between a first clock signal and a second signal to provide the pair of signals, the second signal being synchronized with an output signal of the loop, apparatus for providing a third up or down signal to the charge pump offsetting the effect of the introduced phase difference, and apparatus for obtaining a loop control voltage from the charge pump.
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公开(公告)号:CA2105107C
公开(公告)日:1999-01-19
申请号:CA2105107
申请日:1993-08-30
Applicant: ATI TECHNOLOGIES INC
Inventor: SETO JIM M N , COLBECK ROGER P , CHAU RAYMOND , LEUNG SIMON C F
Abstract: A voltage to current converter is formed of a first current steering mirror which includes first binary weighted current mirror transistors and receives an input voltage signal and converts it to an output current. The converter also is formed of a second current mirror which generates a selectable output current, the second current mirror being formed of second binary weighted current mirror transistors. The output currents of the first current steering mirror and second current mirror are added and the sum is provided to the control input of a current controlled oscillator which can be used in a phase locked loop.
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公开(公告)号:CA2105107A1
公开(公告)日:1994-12-24
申请号:CA2105107
申请日:1993-08-30
Applicant: ATI TECHNOLOGIES INC
Inventor: SETO JIM M N , COLBECK ROGER P , CHAU RAYMOND , LEUNG SIMON C F
Abstract: A voltage to current converter is formed of a first current steering mirror which includes first binary weighted current mirror transistors and receives an input voltage signal and converts it to an output current. The converter also is formed of a second current mirror which generates a selectable output current, the second current mirror being formed of second binary weighted current mirror transistors. The output currents of the first current steering mirror and second current mirror are added and the sum is provided to the control input of a current controlled oscillator which can be used in a phase locked loop.
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