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公开(公告)号:WO2023043579A1
公开(公告)日:2023-03-23
申请号:PCT/US2022/041092
申请日:2022-08-22
Applicant: APPLE INC.
Inventor: LIN, Chin-wei , COLON-BERRIOS, Aida, R , GUI, Fan , AYGUN, Levent, Erdal , ESMAEILI RAD, Mohammad, Reza , TU, Ran , LIN, Xin , WANG, Yun
IPC: G09G3/3233
Abstract: A display may include an array of pixels. Each pixel in the array includes a drive transistor (Tdrive), a light-emitting-diode (26), a storage capacitor (Cst), a current boosting capacitor (Cboost) and an isolation transistor (Tiso) connected between a static voltage line (Vdc) and the current boosting capacitor. The pixel may further include emission transistors (Teml, Tem2), a data loading transistor (Tdata), a gate voltage setting transistor (Tref) and an anode reset transistor (Tar). A data refresh may include a initialization phase, a threshold voltage sampling phase, and a data programming phase. The threshold voltage sampling phase can be substantially longer than the data programming phase to decrease a current sampling level during the threshold voltage sampling phase, which helps reduce the display luminance sensitivity to temperature variations. During a data refresh, the isolation transistor can be turned on to provide current boosting. During emission periods, the isolation transistor is turned off to prevent cathode noise from potentially coupling through to one or more direct-current voltage nodes in the pixel.
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公开(公告)号:WO2019112683A1
公开(公告)日:2019-06-13
申请号:PCT/US2018/053589
申请日:2018-09-28
Applicant: APPLE INC.
Inventor: LIN, Chin-Wei , GUI, Fan , LIN, Hung, Sheng , NHO, Hyunwoo , RYU, Jie, Won , TAN, Junhua , BRAHMA, Kingsuk , GHARGHI, Majid , ESMAEILI ROAD, Mohammad, Reza , ONO, Shinya , WANG, Yun , LEE, Zino
IPC: G09G3/3233 , G09G3/3291
CPC classification number: G09G3/3233 , G09G3/3291 , G09G2300/0417 , G09G2300/0842 , G09G2300/0861 , G09G2310/0205 , G09G2310/0218 , G09G2310/0251 , G09G2310/0262 , G09G2310/0294 , G09G2320/0209 , G09G2320/0219 , G09G2320/0233 , G09G2320/0285 , G09G2320/0295 , G09G2320/045
Abstract: A display may include an array of organic light-emitting diode display pixels having transistors characterized by threshold voltages subject to transistor variations. Compensation circuitry may be used to sense a current from selected display pixels. A display pixel may include a drive transistor, a gate setting transistor for driving a reference voltage onto the gate terminal of the drive transistor, a data loading and current sensing transistor for connecting the drive transistor to a data/current-sensing line, a light-emitting diode, an emission control transistor coupled between the drive transistor and the diode, and an anode resetting transistor for selectively resetting the anode terminal of the diode. During in-frame current sensing operations, the emission control transistor may be turned off to decouple the drive transistor from the diode, thereby blocking off any residue current and lateral leakage current that may be present at the diode.
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公开(公告)号:EP4381496A1
公开(公告)日:2024-06-12
申请号:EP22769462.7
申请日:2022-08-22
Applicant: Apple Inc.
Inventor: LIN, Chin-wei , COLON-BERRIOS, Aida, R , GUI, Fan , AYGUN, Levent, Erdal , ESMAEILI RAD, Mohammad, Reza , TU, Ran , LIN, Xin , WANG, Yun
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G2300/085220130101 , G09G2300/081920130101 , G09G2300/087620130101 , G09G2320/04520130101 , G09G2320/04120130101 , G09G2300/086120130101 , G09G2310/025120130101 , G09G2310/026220130101 , G09G2330/0620130101
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公开(公告)号:EP3680889A1
公开(公告)日:2020-07-15
申请号:EP20150868.6
申请日:2020-01-09
Applicant: Apple Inc.
Inventor: LIN, Chin-Wei , ONO, Shinya , LEE, Zino , WANG, Yun , GUI, Fan
IPC: G09G3/3233
Abstract: A display pixel is provided that is operable to support hybrid compensation scheme having both in-pixel threshold voltage canceling and external threshold voltage compensation. The display may include multiple p-type silicon transistors with at least one n-type semiconducting-oxide transistor and one storage capacitor. An on-bias stress phase may be performed prior to a threshold voltage sampling and data programming phase to mitigate hysteresis and improve first frame response. In low refresh rate displays, a first additional on-bias stress operation can be performed separate from the threshold voltage sampling and data programming phase during a refresh frame and a second additional on-bias stress operation can be performed during a vertical blanking frame. The display pixel may be configured to receive an initialization voltage and an anode reset voltage, either of which can be dynamically tuned to match the stress of the first and second additional on-bias stress operations to minimize flicker.
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