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    DISPLAYS WITH REDUCED TEMPERATURE LUMINANCE SENSITIVITY
    1.
    发明申请
    DISPLAYS WITH REDUCED TEMPERATURE LUMINANCE SENSITIVITY 审中-公开

    公开(公告)号：WO2022125260A1

    公开(公告)日：2022-06-16

    申请号：PCT/US2021/058951

    申请日：2021-11-11

    Applicant: APPLE INC. [US]/[US]

    Inventor： ONO, Shinya ,  LIN, Chin-Wei ,  LEE, Zino ,  LIN, Chun-Chieh ,  CHEN, Chen-Ming

    IPC: G09G3/3233 ,  H01L27/32

    Abstract: A display may include an array of pixels. Each pixel in the array includes an organic light-emitting diode coupled to a drive transistor, a data loading transistor, a first capacitor for storing data charge, and a second capacitor. During a data programming phase, the data loading transistor may be activated to load in a data value onto the first capacitor. After the data programming phase, the second capacitor may be configured to receive a lower voltage, which extends a threshold voltage sampling time for the pixel. Configured and operated in this way, the temperature luminance sensitivity of the display can be reduced.

    ELECTRONIC DISPLAY WITH HYBRID IN-PIXEL AND EXTERNAL COMPENSATION
    4.
    发明公开
    ELECTRONIC DISPLAY WITH HYBRID IN-PIXEL AND EXTERNAL COMPENSATION 审中-公开

    公开(公告)号：EP3680889A1

    公开(公告)日：2020-07-15

    申请号：EP20150868.6

    申请日：2020-01-09

    Applicant: Apple Inc.

    Inventor： LIN, Chin-Wei ,  ONO, Shinya ,  LEE, Zino ,  WANG, Yun ,  GUI, Fan

    IPC: G09G3/3233

    Abstract: A display pixel is provided that is operable to support hybrid compensation scheme having both in-pixel threshold voltage canceling and external threshold voltage compensation. The display may include multiple p-type silicon transistors with at least one n-type semiconducting-oxide transistor and one storage capacitor. An on-bias stress phase may be performed prior to a threshold voltage sampling and data programming phase to mitigate hysteresis and improve first frame response. In low refresh rate displays, a first additional on-bias stress operation can be performed separate from the threshold voltage sampling and data programming phase during a refresh frame and a second additional on-bias stress operation can be performed during a vertical blanking frame. The display pixel may be configured to receive an initialization voltage and an anode reset voltage, either of which can be dynamically tuned to match the stress of the first and second additional on-bias stress operations to minimize flicker.

    DISPLAYS WITH REDUCED TEMPERATURE LUMINANCE SENSITIVITY
    5.
    发明申请
    DISPLAYS WITH REDUCED TEMPERATURE LUMINANCE SENSITIVITY 审中-公开

    公开(公告)号：WO2022187245A1

    公开(公告)日：2022-09-09

    申请号：PCT/US2022/018339

    申请日：2022-03-01

    Applicant: APPLE INC.

    Inventor： LIN, Chin-Wei ,  ONO, Shinya ,  LEE, Zino

    IPC: G09G3/3233

    Abstract: A display may include an array of pixels. Each pixel in the array may include a drive transistor, emission transistors, a data loading transistor, a gate voltage setting transistor, an initialization transistor, an anode reset transistor, a storage capacitor, and an optional current boosting capacitor. A data refresh may include a initialization phase, a threshold voltage sampling phase, and a data programming phase. The threshold voltage sampling phase can be substantially longer than the data programming phase to decrease a current sampling level during the threshold voltage sampling phase, which helps reduce the display luminance sensitivity to temperature variations.

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