公开(公告)号：US06482307B2

公开(公告)日：2002-11-19

申请号：US09735546

申请日：2000-12-14

Applicant: Jalal Ashjaee ,  Boguslaw A. Nagorski ,  Bulent M. Basol ,  Homayoun Talieh ,  Cyprian Uzoh

Inventor： Jalal Ashjaee ,  Boguslaw A. Nagorski ,  Bulent M. Basol ,  Homayoun Talieh ,  Cyprian Uzoh

IPC: C25D518

CPC classification number: C25D17/001 ,  C25D7/123 ,  C25D17/005 ,  C25F7/00 ,  H01L21/2885

Abstract: Deposition of conductive material on or removal of conductive material from a wafer frontal side of a semiconductor wafer is performed by providing an anode having an anode area which is to face the wafer frontal side, and electrically connecting the wafer frontal side with at least one electrical contact, outside of the anode area, by pushing the electrical contact and the wafer frontal side into proximity with each other. A potential is applied between the anode and the electrical contact, and the wafer is moved with respect to the anode and the electrical contact. Full-face electroplating or electropolishing over the wafer frontal side surface, in its entirety, is thus permitted.

Abstract translation: 通过提供具有面向晶片正面的阳极区域的阳极和将晶片正面与至少一个电气电连接来进行导电材料沉积在半导体晶片的晶片正面上或从晶片正面去除导电材料 通过将电接触和晶片正面推动到彼此靠近来接触阳极区域外部。 在阳极和电接触之间施加电势，并且晶片相对于阳极和电触点移动。 因此允许在整个晶片正面侧面上进行全面电镀或电解抛光。

公开(公告)号：US07282124B2

公开(公告)日：2007-10-16

申请号：US10459320

申请日：2003-06-10

Applicant: Homayoun Talieh ,  Cyprian Uzoh ,  Bulent M. Basol

Inventor： Homayoun Talieh ,  Cyprian Uzoh ,  Bulent M. Basol

IPC: C25D17/00

CPC classification number: B23H3/04 ,  B23H5/08 ,  C25D5/08 ,  C25D17/00 ,  C25D17/001 ,  C25D17/005 ,  C25F7/00 ,  H01L21/2885

Abstract: Substantially uniform deposition of conductive material on a surface of a substrate, which substrate includes a semiconductor wafer, from an electrolyte containing the conductive material can be provided by way of a particular device which includes first and second conductive elements. The first conductive element can have multiple electrical contacts, of identical or different configurations, or may be in the form of a conductive pad, and can contact or otherwise electrically interconnect with the substrate surface over substantially all of the substrate surface. Upon application of a potential between the first and second conductive elements while the electrolyte makes physical contact with the substrate surface and the second conductive element, the conductive material is deposited on the substrate surface. It is possible to reverse the polarity of the voltage applied between the anode and the cathode so that electro-etching of deposited conductive material can be performed.

公开(公告)号：US06942780B2

公开(公告)日：2005-09-13

申请号：US10460032

申请日：2003-06-11

Applicant: Bulent M. Basol ,  Cyprian Uzoh ,  Homayoun Talieh

Inventor： Bulent M. Basol ,  Cyprian Uzoh ,  Homayoun Talieh

IPC: C25D7/12 ,  C25D17/00 ,  C25D17/08 ,  C25D21/00 ,  H01L21/288 ,  H01L21/321 ,  H01L21/768 ,  C25D5/00 ,  C25D5/08 ,  C25F3/00

CPC classification number: C25D5/02 ,  C25D7/123 ,  C25D17/001 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/76877

Abstract: An apparatus for processing a material on a wafer surface includes a cavity defined by a peripheral wall and configured to direct a process solution and direct it to the surface to to a first wafer surface region without being directed to a second wafer surface region, a head configured to hold the wafer so that the surface of the wafer faces the cavity, and an electrical contact member positioned outside the cavity peripheral wall and configured to contact the second wafer surface region extending beyond the cavity, when the wafer is moved relative to the contact member. Advantages of the invention include substantially full surface treatment of the wafer.

Abstract translation: 用于处理晶片表面上的材料的设备包括由周壁限定的空腔，并且被配置为引导处理溶液并将其引导到表面到达第一晶片表面区域而不被引导到第二晶片表面区域，头部 被配置为保持所述晶片使得所述晶片的表面面向所述空腔;以及电接触构件，其定位在所述腔周壁外部并且被配置为当所述晶片相对于所述触点移动时接触延伸超过所述腔的所述第二晶片表面区域 会员。 本发明的优点包括晶片的基本全表面处理。

公开(公告)号：US07476304B2

公开(公告)日：2009-01-13

申请号：US10947628

申请日：2004-09-21

Applicant: Jalal Ashjaee ,  Boguslaw Nagorski ,  Bulent M. Basol ,  Homayoun Talieh ,  Cyprian Uzoh

Inventor： Jalal Ashjaee ,  Boguslaw Nagorski ,  Bulent M. Basol ,  Homayoun Talieh ,  Cyprian Uzoh

IPC: C25D17/00 ,  C25D5/00

CPC classification number: C25F7/00 ,  C25D7/123 ,  C25D17/001 ,  H01L21/2885

Abstract: Deposition of conductive material on or removal of conductive material from a workpiece frontal side of a semiconductor workpiece is performed by providing an anode having an anode area which is to face the workpiece frontal side, and electrically connecting the workpiece frontal side with at least one electrical contact, outside of the anode area, by pushing the electrical contact and the workpiece frontal side into proximity with each other. A potential is applied between the anode and the electrical contact, and the workpiece is moved with respect to the anode and the electrical contact. Full-face electroplating or electropolishing over the workpiece frontal side surface, in its entirety, is thus permitted.

Abstract translation: 通过提供具有正面与工件正面的阳极区域并将工件正面与至少一个电气电连接的阳极进行导电材料沉积在导电材料上或从半导体工件的工件正面去除导电材料 通过将电触点和工件正面推入彼此靠近，在阳极区域外部接触。 在阳极和电接触之间施加电位，并且工件相对于阳极和电触点移动。 因此允许在工件正面侧面上进行全面电镀或电解抛光。

公开(公告)号：US07309413B2

公开(公告)日：2007-12-18

申请号：US10459321

申请日：2003-06-10

Applicant: Homayoun Talieh ,  Cyprian Uzoh ,  Bulent M. Basol

Inventor： Homayoun Talieh ,  Cyprian Uzoh ,  Bulent M. Basol

IPC: C25D5/04 ,  C25D7/12 ,  C25F3/12

CPC classification number: B23H3/04 ,  B23H5/08 ,  C25D5/08 ,  C25D17/00 ,  C25D17/001 ,  C25D17/005 ,  C25F7/00 ,  H01L21/2885

Abstract: Substantially uniform deposition of conductive material on a surface of a substrate, which substrate includes a semiconductor wafer, from an electrolyte containing the conductive material can be provided by way of a particular device which includes first and second conductive elements. The first conductive element can have multiple electrical contacts, of identical or different configurations, or may be in the form of a conductive pad, and can contact or otherwise electrically interconnect with the substrate surface over substantially all of the substrate surface. Upon application of a potential between the first and second conductive elements while the electrolyte makes physical contact with the substrate surface and the second conductive element, the conductive material is deposited on the substrate surface. It is possible to reverse the polarity of the voltage applied between the anode and the cathode so that electro-etching of deposited conductive material can be performed.

Abstract translation: 可以通过包括第一和第二导电元件的特定装置来提供导电材料在包含导电材料的电解质的衬底的包括半导体晶片的表面上的基本均匀沉积。 第一导电元件可以具有相同或不同构造的多个电触点，或者可以是导电焊盘的形式，并且可以在基本上所有的衬底表面上与衬底表面接触或以其他方式电互连。 当在电解质与衬底表面和第二导电元件物理接触的同时在第一和第二导电元件之间施加电势时，导电材料沉积在衬底表面上。 可以使施加在阳极和阴极之间的电压的极性反转，从而可以对沉积的导电材料进行电蚀刻。

公开(公告)号：US07201829B2

公开(公告)日：2007-04-10

申请号：US09960236

申请日：2001-09-20

Applicant: Bulent M. Basol ,  Cyprian Uzoh ,  Jeff A. Bogart

Inventor： Bulent M. Basol ,  Cyprian Uzoh ,  Jeff A. Bogart

IPC: C25F3/16 ,  C25F5/00 ,  C25D17/00

CPC classification number: H01L21/76879 ,  B24B37/042 ,  C25D5/02 ,  C25D5/08 ,  C25D5/22 ,  C25D7/12 ,  C25D17/001 ,  C25F7/00 ,  H01L21/2885

Abstract: The present invention includes a mask plate design that includes at least one or a plurality of channels portions on a surface of the mask plate, into which electrolyte solution will accumulate when the mask plate surface is disposed on a surface of wafer, and out of which the electrolyte solution will freely flow. There are also at least one or a plurality of polish portions on the mask plate surface that allow for polishing of the wafer when the mask plate surface is disposed on a surface of wafer.

Abstract translation: 本发明包括掩模板设计，其包括在掩模板的表面上的至少一个或多个通道部分，当掩模板表面设置在晶片的表面上时，电解质溶液将积聚在其中，并且其中 电解液会自由流动。 掩模板表面上还有至少一个或多个抛光部分，当掩模板表面设置在晶片的表面上时，允许抛光晶片。

公开(公告)号：US06852630B2

公开(公告)日：2005-02-08

申请号：US09841622

申请日：2001-04-23

Applicant: Bulent M. Basol ,  Cyprian Uzoh ,  Halit N. Yakupoglu ,  Homayoun Talieh

Inventor： Bulent M. Basol ,  Cyprian Uzoh ,  Halit N. Yakupoglu ,  Homayoun Talieh

IPC: B23H5/08 ,  C25F3/14 ,  H01L21/288 ,  H01L21/321 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/302

CPC classification number: H01L21/32115 ,  B23H5/08 ,  C25F3/14 ,  H01L21/2885 ,  H01L21/32134 ,  H01L21/7684

Abstract: A system for optionally depositing or etching a layer of a wafer includes mask plate opposed to the wafer with the mask plate having a plurality of openings that transport a solution to the wafer. An electrode assembly has a first electrode member and a second electrode member having channels that operatively interface a peripheral and center part of the wafer. The channels transport the solution to the mask.

Abstract translation: 用于可选地沉积或蚀刻晶片层的系统包括与晶片相对的掩模板，掩模板具有将溶液输送到晶片的多个开口。 电极组件具有第一电极部件和第二电极部件，该第二电极部件具有可操作地与晶片的周边部分和中心部分接合的通道。 通道将解决方案传输到面罩。

公开(公告)号：US07329335B2

公开(公告)日：2008-02-12

申请号：US10459323

申请日：2003-06-10

Applicant: Homayoun Talieh ,  Cyprian Uzoh ,  Bulent M. Basol

Inventor： Homayoun Talieh ,  Cyprian Uzoh ,  Bulent M. Basol

IPC: B23H3/00 ,  C25F3/30 ,  B23H7/12

CPC classification number: B23H3/04 ,  B23H5/08 ,  C25D5/08 ,  C25D17/00 ,  C25D17/001 ,  C25D17/005 ,  C25F7/00 ,  H01L21/2885

Abstract: Substantially uniform deposition of conductive material on a surface of a substrate, which substrate includes a semiconductor wafer, from an electrolyte containing the conductive material can be provided by way of a particular device which includes first and second conductive elements. The first conductive element can have multiple electrical contacts, of identical or different configurations, or may be in the form of a conductive pad, and can contact or otherwise electrically interconnect with the substrate surface over substantially all of the substrate surface. Upon application of a potential between the first and second conductive elements while the electrolyte makes physical contact with the substrate surface and the second conductive element, the conductive material is deposited on the substrate surface. It is possible to reverse the polarity of the voltage applied between the anode and the cathode so that electro-etching of deposited conductive material can be performed.

Abstract translation: 可以通过包括第一和第二导电元件的特定装置来提供导电材料在包含导电材料的电解质的衬底的包括半导体晶片的表面上的基本均匀沉积。 第一导电元件可以具有相同或不同构造的多个电触点，或者可以是导电焊盘的形式，并且可以在基本上所有的衬底表面上与衬底表面接触或以其他方式电互连。 当在电解质与衬底表面和第二导电元件物理接触的同时在第一和第二导电元件之间施加电势时，导电材料沉积在衬底表面上。 可以使施加在阳极和阴极之间的电压的极性反转，从而可以对沉积的导电材料进行电蚀刻。

公开(公告)号：US06943112B2

公开(公告)日：2005-09-13

申请号：US10379265

申请日：2003-03-03

Applicant: Bulent M. Basol ,  Cyprian Uzoh

Inventor： Bulent M. Basol ,  Cyprian Uzoh

IPC: H01L21/288 ,  H01L21/321 ,  H01L21/768 ,  H01L21/44

CPC classification number: C25D17/001 ,  C25D7/123 ,  H01L21/2885 ,  H01L21/32125 ,  H01L21/7684 ,  H01L21/76877

Abstract: The process of the present invention forms copper interconnects in a semiconductor wafer surface. During the process, initially, narrow and large features are provided in the top surface of the wafer, and then a primary copper layer is deposited by employing an electrochemical deposition process. The primary copper layer completely fills the features and forms a planar surface over the narrow feature and a non-planar surface over the large feature. By employing an electrochemical mechanical deposition process, a secondary copper layer is deposited onto the primary copper layer to form a planar copper layer over the narrow and large features. After this process step, the thickness of the planar copper layer is reduced using an electropolishing process.

Abstract translation: 本发明的方法在半导体晶片表面中形成铜互连。 在该过程中，最初，在晶片的顶表面中提供窄且大的特征，然后通过使用电化学沉积工艺沉积初级铜层。 初级铜层完全填满了特征，并在狭窄的特征上形成一个平坦的表面，在大的特征上形成一个非平面的表面。 通过采用电化学机械沉积工艺，将二次铜层沉积在初级铜层上，以形成窄和大特征上的平面铜层。 在该工艺步骤之后，使用电解抛光工艺来减小平面铜层的厚度。

公开(公告)号：US06852208B2

公开(公告)日：2005-02-08

申请号：US10265460

申请日：2002-10-03

Applicant: Jalal Ashjaee ,  Boguslaw Nagorski ,  Bulent M. Basol ,  Homayoun Talieh ,  Cyprian Uzoh

Inventor： Jalal Ashjaee ,  Boguslaw Nagorski ,  Bulent M. Basol ,  Homayoun Talieh ,  Cyprian Uzoh

IPC: C25D7/12 ,  C25F7/00 ,  C25D5/00

CPC classification number: C25F7/00 ,  C25D7/123 ,  C25D17/001 ,  H01L21/2885

Abstract: Deposition of conductive material on or removal of conductive material from a workpiece frontal side of a semiconductor workpiece is performed by providing an anode having an anode area which is to face the workpiece frontal side, and electrically connecting the workpiece frontal side with at least one electrical contact, outside of the anode area, by pushing the electrical contact and the workpiece frontal side into proximity with each other. A potential is applied between the anode and the electrical contact, and the workpiece is moved with respect to the anode and the electrical contact. Full-face electroplating or electropolishing over the workpiece frontal side surface, in its entirety, is thus permitted.

Abstract translation: 通过提供具有正面与工件正面的阳极区域并将工件正面与至少一个电气电连接的阳极进行导电材料沉积在导电材料上或从半导体工件的工件正面去除导电材料 通过将电触点和工件正面推入彼此靠近，在阳极区域外部接触。 在阳极和电接触之间施加电位，并且工件相对于阳极和电触点移动。 因此允许在工件正面侧面上进行全面电镀或电解抛光。