公开(公告)号：WO0245277A9

公开(公告)日：2003-02-06

申请号：PCT/US0144443

申请日：2001-11-28

Applicant: CANDESCENT TECH CORP

Inventor： ENACHESCU MARIUS ,  BELIKOV SERGEY ,  MEIER STEPHEN F

IPC: G01N25/72 ,  G01M11/00 ,  G01R31/308 ,  G09F9/00 ,  G09G3/00 ,  H01J9/42 ,  H04B

CPC classification number: G09G3/006 ,  G01R31/308

Abstract: A method and system for detecting electrical short circuit defects in a plate structure of a flat panel display, for example, a field emission display (FED). In one embodiment, the process first applies a stimulation to the electrical conductors of the plate structure. Next, the process creates an infra-red thermal mapping of a cathode region the FED. For example, an infra-red array may be used to snap a picture of the cathode of the FED.Then , the process analyzes the infra-red thermal mapping to determine a region of the FED which contains the electrical short circuit defect. Another embodiment localizes the defect to one sub-pixel by performing an infra-red mapping of the region which the previous IR mapping process determined to contain the electrical short circuit defect. Then, the process analyzes this infra-red mapping to determine a sub-pixel of the FED which contains the electrical short circuit defect.

Abstract translation: 一种用于检测平板显示器（例如场致发射显示器（FED））的板结构中的电短路缺陷的方法和系统。 在一个实施例中，该过程首先对板结构的电导体施加刺激。 接下来，该过程创建FED的阴极区域的红外热映射。 例如，可以使用红外阵列来捕捉FED的阴极的图像。然后，该过程分析红外热映射以确定包含电短路缺陷的FED的区域。 另一个实施例通过执行确定为包含电短路缺陷的先前IR映射处理的区域的红外映射来将缺陷定位到一个子像素。 然后，该过程分析该红外映射以确定包含电短路缺陷的FED的子像素。

公开(公告)号：WO0245277A3

公开(公告)日：2004-02-12

申请号：PCT/US0144443

申请日：2001-11-28

Applicant: CANDESCENT TECH CORP

Inventor： ENACHESCU MARIUS ,  BELIKOV SERGEY ,  MEIER STEPHEN F

IPC: G01N25/72 ,  G01M11/00 ,  G01R31/308 ,  G09F9/00 ,  G09G3/00 ,  H01J9/42 ,  G01R31/28 ,  G01R31/302

CPC classification number: G09G3/006 ,  G01R31/308

Abstract: A method and system (200) for detecting electrical short circuit defects in a plate structure of a flat panel display (205), for example, a field emission display (FED). In one embodiment, the process first applies a stimulation (204) to the electrical conductors of the plate structure. Next, the process creates an infra-red thermal mapping (210) of a cathode region the FED. For example, an infra-red array may be used to snap a picture of the cathode of the FED.Then , the process analyzes (100) the infra-red thermal mapping to determine a region of the FED which contains the electrical short circuit defect (215). Another embodiment localizes the defect to one sub-pixel by performing an infra-red mapping (212) of the region which the previous IR mapping process determined to contain the electrical short circuit defect (215). Then, the process analyzes (100) this infra-red mapping to determine a sub-pixel of the FED which contains the electrical short circuit defect (215).

Abstract translation: 一种用于检测平板显示器（205）的板结构中的电短路缺陷的方法和系统（200），例如场致发射显示器（FED）。 在一个实施例中，该过程首先对板结构的电导体施加刺激（204）。 接下来，该过程创建FED的阴极区域的红外热映射（210）。 例如，可以使用红外阵列来捕捉FED阴极的图像。然后，该过程分析（100）红外热映射以确定包含电短路缺陷的FED的区域 （215）。 另一实施例通过执行确定为包含电短路缺陷的先前IR映射处理的区域的红外映射（212）将缺陷定位到一个子像素。 然后，该过程分析（100）该红外映射以确定包含电短路缺陷的FED的子像素（215）。

公开(公告)号：AU3049602A

公开(公告)日：2002-06-11

申请号：AU3049602

申请日：2001-11-28

Applicant: CANDESCENT TECH CORP

Inventor： ENACHESCU MARIUS ,  BELIKOV SERGEY ,  MEIER STEPHEN F

IPC: G01N25/72 ,  G01M11/00 ,  G01R31/308 ,  G09F9/00 ,  G09G3/00 ,  H01J9/42

Abstract: A method and system for detecting electrical short circuit defects in a plate structure of a flat panel display, for example, a field emission display (FED) is disclosed. In one embodiment, the process first applies a stimulation to the electrical conductors of the plate structure. Next, the process creates an infra-red thermal mapping of a cathode region of the FED. For example, an infra-red array may be used to snap a picture of the cathode of the FED. Then, the process analyzes the infra-red thermal mapping to determine a region of the FED which contains the electrical short circuit defect. Another embodiment localizes the defect to one sub-pixel by performing an infra-red mapping of the region which the previous IR mapping process determined to contain the electrical short circuit defect. Then, the process analyzes this infra-red mapping to determine a sub-pixel of the FED which contains the electrical short circuit defect.

公开(公告)号：EP1405091A4

公开(公告)日：2005-07-20

申请号：EP01990733

申请日：2001-11-28

Applicant: CANDESCENT TECH CORP

Inventor： ENACHESCU MARIUS ,  BELIKOV SERGEY ,  MEIER STEPHEN F

IPC: G01N25/72 ,  G01M11/00 ,  G01R31/308 ,  G09F9/00 ,  G09G3/00 ,  H01J9/42

CPC classification number: G09G3/006 ,  G01R31/308

Abstract: A method and system for detecting electrical short circuit defects in a plate structure of a flat panel display, for example, a field emission display (FED). In one embodiment, the process first applies a stimulation to the electrical conductors of the plate structure. Next, the process creates an infra-red thermal mapping of a cathode region the FED. For example, an infra-red array may be used to snap a picture of the cathode of the FED.Then , the process analyzes the infra-red thermal mapping to determine a region of the FED which contains the electrical short circuit defect. Another embodiment localizes the defect to one sub-pixel by performing an infra-red mapping of the region which the previous IR mapping process determined to contain the electrical short circuit defect. Then, the process analyzes this infra-red mapping to determine a sub-pixel of the FED which contains the electrical short circuit defect.