公开(公告)号：WO03037529B1

公开(公告)日：2003-09-04

申请号：PCT/US0235225

申请日：2002-10-31

Applicant: CANDESCENT TECH CORP

Inventor： RITTMANN BRIAN D ,  TROLLSAS OLOF M ,  SAHLSTROM KRIS E ,  SAM SOPHEAK P

IPC: H01J9/227 ,  B05D1/32 ,  B05D5/06 ,  B05D5/12

CPC classification number: H01J9/227

Abstract: The present writing reveals a method for screen printed lacquer deposition for a display device comprising aligning a mask on top of a faceplate of the display device. Next, there is deposited a lacquer material above the mask. Then, there is performed a screen printing process to apply the lacquer material through the mask and onto the faceplate to form a lacquer layer on the faceplate. Finally, the lacquer layer is dried.

Abstract translation: 本发明揭示了一种用于显示装置的丝网印刷漆沉积的方法，包括在显示装置的面板的顶部上对准掩模。 接下来，在面罩上方沉积一层漆料。 然后，进行丝网印刷工艺，以将漆料通过面罩施加到面板上以在面板上形成漆层。 最后，将漆层干燥。

公开(公告)号：WO03002957A3

公开(公告)日：2003-05-01

申请号：PCT/US0220243

申请日：2002-06-24

Applicant: CANDESCENT TECH CORP

Inventor： CUMMINGS WILLIAM ,  DUNPHY JAMES C ,  HANSEN RONALD L ,  LIU JUN ,  CRESSI LEE ,  STANNERS COLIN ,  SPINDT CHRISTOPHER J

IPC: G01R31/24 ,  G09G3/20 ,  G09G3/22 ,  G09G3/10

CPC classification number: G09G3/22 ,  G09G2320/0233 ,  G09G2320/0285

Abstract: Method for compensating for brightness variations in a field emission device (100a). In one embodiment, a method and system are described for measuring the relative brightness of rows of a field emission display (FED) device (100a), storing information representing the measured brightness into a correction table and using the correction table to provide uniform row brightness in the display by adjusting row voltages and/or row on-time periods. A special measurement process is described for providing accurate current measurements on the rows. This embodiment compensates for brightness variations of the rows, e.g., for rows near the spacer walls (30). In another embodiment, a periodic signal, e.g., a high frequency noise signal (340), is added to the row on-time pulse in order to camouflage brightness variations in the rows near the spacer walls (30). In another embodiment, the area under the row on-time pulse is adjusted to provide row-by-row brightness compensation based on correction values stored in a memory resident correction table (60). In another embodiment, the brightness of each row is measured and compiled into a data profile for the FED. The data profile is used to control cathode burn-in processes so that brightness variations are corrected by physically altering the characteristics of the emitters of the rows.

Abstract translation: 用于补偿场发射器件（100a）中的亮度变化的方法。 在一个实施例中，描述了用于测量场致发射显示器（FED）设备（100a）的行的相对亮度的方法和系统，将表示测量的亮度的信息存储到校正表中并且使用校正表来提供均匀的行亮度 在显示器中通过调节行电压和/或行导通时间周期。 描述了一种特殊的测量过程，用于在行上提供精确的电流测量。 该实施例补偿了行的亮度变化，例如对于间隔壁（30）附近的行。 在另一个实施例中，将周期性信号（例如高频噪声信号（340））加到行导通时间脉冲上以便伪装间隔壁（30）附近的行中的亮度变化。 在另一个实施例中，基于存储在存储器驻留校正表（60）中的校正值来调整行导通时间脉冲下的面积以提供逐行亮度补偿。 在另一个实施例中，每行的亮度被测量并被编译成用于FED的数据简档。 数据配置文件用于控制阴极老化过程，以便通过物理改变行发射器的特性来校正亮度变化。

公开(公告)号：WO02073582A3

公开(公告)日：2002-11-14

申请号：PCT/US0206067

申请日：2002-02-26

Applicant: CANDESCENT TECH CORP

Inventor： DUNPHY JAMES C ,  HANSEN RONALD L ,  LINDBERG BRIAN E ,  TRUPPA JEROME M ,  ELLOWAY DONALD J ,  AMANIAMPONG DUKE K

IPC: H01J29/04 ,  G09G3/20 ,  G09G3/22 ,  H01J9/44 ,  H01J29/28 ,  H01J29/62 ,  H01J29/94 ,  H01J29/96 ,  H01J31/12 ,  G09G3/10

CPC classification number: H01J9/44 ,  G09G3/22 ,  G09G2310/066 ,  H01J2209/0223

Abstract: A circuit and method for turning-on and turning-off elements of an field emission display device to protect against emitter electrode(60) and gate electrode(50) degradation. The circuit(910) includes control logic(916) having a sequencer which in one embodiment can be realized using a state machine. Upon power-on, the control logic sends an enable signal to a high voltage power supply (912) that supplies voltage to the anode electrode (914). At this time a low voltage power supply (918) and driving circuitry (920)are disabled. Upon receiving a confirmation signal from the high voltage power supply, the control logic enables the low voltage power supply which supplies voltage to the driving circuitry (920). Upon receiving a confirmation signal from the low voltage power supply (918), or optionally after expiration of a predetermined time period, the control logic (916) then enables the driving circuitry (920) which drives the gate electrodes (50) and the emitter electrodes (60) which make up the rows and columns of the FED device. Upon power down, the control logic (916) first disables the low voltage power supply (918), then the high voltage power supply (912).

Abstract translation: 一种用于导通和关断场致发射显示设备的元件的电路和方法，以防止发射电极（60）和栅电极（50）退化。 电路（910）包括具有定序器的控制逻辑（916），定序器在一个实施例中可以使用状态机来实现。 在通电时，控制逻辑将启动信号发送到将电压供应到阳极电极（914）的高压电源（912）。 此时，低压电源（918）和驱动电路（920）被禁用。 在从高压电源接收到确认信号时，控制逻辑启用向驱动电路（920）供应电压的低压电源。 一旦从低电压电源（918）接收到确认信号，或者可选地在预定时间段期满后，控制逻辑（916）然后启用驱动电路（920），其驱动栅电极（50）和发射器 构成FED装置的行和列的电极（60）。 在断电时，控制逻辑（916）首先禁用低电压电源（918），然后禁用高电压电源（912）。

公开(公告)号：WO2004023441A3

公开(公告)日：2004-06-17

申请号：PCT/US0327299

申请日：2003-08-29

Applicant: CANDESCENT TECH CORP ,  DEROUIN TIMOTHY A ,  GOPALAKRISHNAN SUDHAKAR

Inventor： DEROUIN TIMOTHY A ,  GOPALAKRISHNAN SUDHAKAR

IPC: H01J29/87 ,  C03C27/06 ,  H01J29/02 ,  H01J29/86 ,  H01J31/12 ,  H01J1/62

CPC classification number: H01J31/123 ,  C03C27/06 ,  H01J29/028 ,  H01J29/864 ,  H01J2329/863 ,  H01J2329/864 ,  H01J2329/8645

Abstract: A spacer structure (140) for a display is disclosed that has a CTE which matches or very closely approximates the CTE of a high quality, desirable glass from which other display structures such as faceplates can be fabricated. The spacer structure (140) is composed of a material that has a CTE that is tailorable within a range that closely matches the CTE range spanned by a variety of readily available high quality, desirable glass from which other display structures such as faceplates can be fabricated. The spacer structure (140) disclosed has a CTE that achieves the foregoing qualities and retains all other properties characterizing requirements for use in displays. Further, the spacer structure (140) disclosed has a CTE that enables great flexibility in the selection of other display components, without having to revamp existing fabrication techniques. Further still, a spacer structure (140) is disclosed that minimizes zero current shift.

Abstract translation: 公开了一种用于显示器的间隔件结构（140），其具有与可以制造其他显示结构（诸如面板）的高质量理想玻璃的CTE匹配或非常接近的CTE。 间隔件结构（140）由具有CTE的材料构成，该CTE可在与紧密匹配由各种容易获得的高质量理想玻璃所跨越的CTE范围匹配的范围内调节，可从其制造诸如面板的其他显示结构 。 所公开的隔离物结构（140）具有CTE，其实现了前述的质量并且保留了所有其他特性以表征用于显示器的要求。 此外，所公开的隔离物结构（140）具有CTE，其能够在选择其他显示组件方面具有很大的灵活性，而无需改造现有的制造技术。 此外，公开了一种使零电流偏移最小化的间隔件结构（140）。

公开(公告)号：WO0245277A9

公开(公告)日：2003-02-06

申请号：PCT/US0144443

申请日：2001-11-28

Applicant: CANDESCENT TECH CORP

Inventor： ENACHESCU MARIUS ,  BELIKOV SERGEY ,  MEIER STEPHEN F

IPC: G01N25/72 ,  G01M11/00 ,  G01R31/308 ,  G09F9/00 ,  G09G3/00 ,  H01J9/42 ,  H04B

CPC classification number: G09G3/006 ,  G01R31/308

Abstract: A method and system for detecting electrical short circuit defects in a plate structure of a flat panel display, for example, a field emission display (FED). In one embodiment, the process first applies a stimulation to the electrical conductors of the plate structure. Next, the process creates an infra-red thermal mapping of a cathode region the FED. For example, an infra-red array may be used to snap a picture of the cathode of the FED.Then , the process analyzes the infra-red thermal mapping to determine a region of the FED which contains the electrical short circuit defect. Another embodiment localizes the defect to one sub-pixel by performing an infra-red mapping of the region which the previous IR mapping process determined to contain the electrical short circuit defect. Then, the process analyzes this infra-red mapping to determine a sub-pixel of the FED which contains the electrical short circuit defect.

Abstract translation: 一种用于检测平板显示器（例如场致发射显示器（FED））的板结构中的电短路缺陷的方法和系统。 在一个实施例中，该过程首先对板结构的电导体施加刺激。 接下来，该过程创建FED的阴极区域的红外热映射。 例如，可以使用红外阵列来捕捉FED的阴极的图像。然后，该过程分析红外热映射以确定包含电短路缺陷的FED的区域。 另一个实施例通过执行确定为包含电短路缺陷的先前IR映射处理的区域的红外映射来将缺陷定位到一个子像素。 然后，该过程分析该红外映射以确定包含电短路缺陷的FED的子像素。

公开(公告)号：WO0068732A9

公开(公告)日：2002-06-20

申请号：PCT/US0012090

申请日：2000-05-03

Applicant: CANDESCENT TECH CORP

Inventor： DUBOC ROBERT M JR ,  CURTIN CHRISTOPHER J ,  CROSSLAND WILLIAM A ,  DAVEY ANTHONY B ,  FAHLEN THEODORE S

IPC: G02F1/13 ,  G02F1/1347 ,  G09F9/30 ,  G09F9/313 ,  G09F9/33 ,  G09F9/35 ,  G09F9/46 ,  G09G3/36 ,  H01J29/89 ,  H01J31/12 ,  H01L27/32

CPC classification number: G09G3/36 ,  G02F1/1347 ,  G09G2300/023 ,  G09G2320/02

Abstract: A display (50) with enhanced image contrast contains an image-producing component (60) and a set of shutter strips (80). The image-producing component, typically a flat-panel device, has multiple imaging lines that provide light to produce an image. Each shutter strip is situated in front of one or more associated imaging lines. By appropriately switching the shutter strips between light-absorptive and light-transmissive states, the image contrast is enhanced. The shutter strips are typically implemented with a liquid-crystal display structure. The switching of the shutter strips is typically performed with a control component (52/76) which utilizes light to control the shutter switching and which is synchronized to signals (90 or/and 100) that control the imaging lines.

Abstract translation: 具有增强的图像对比度的显示器（50）包含图像产生部件（60）和一组快门条（80）。 图像产生部件，通常是平板装置，具有提供光以产生图像的多个成像线。 每个快门条位于一个或多个相关联的成像线的前面。 通过适当地切换光吸收和透光状态之间的快门条，增强了图像对比度。 快门条通常用液晶显示结构来实现。 快门条的切换通常使用利用光来控制快门切换并与控制成像线的信号（90或/和100）同步的控制部件（52/76）来执行。

公开(公告)号：WO0193298A2

公开(公告)日：2001-12-06

申请号：PCT/US0114897

申请日：2001-05-09

Applicant: CANDESCENT TECH CORP

Inventor： PORTER JOHN D ,  MACKEY BOB L ,  NEIMEYER ROBERT G ,  SPINDT CHRISTOPHER J ,  CHANG DAVID C ,  SAHLSTROM KRIS E

IPC: H01J9/227 ,  H01J29/02 ,  H01J29/32 ,  H01J29/86 ,  H01J29/87 ,  H01J31/12 ,  H01J29/00

CPC classification number: H01J29/028 ,  H01J29/864 ,  H01J2329/00 ,  H01J2329/863

Abstract: A multi-level matrix structure (100) for retaining a support structure within a flat panel display device. In one embodiment, the multi-level matrix structure (100) is comprised of first parallel ridges (102). The multi-level matrix structure (100) further includes second parallel ridges (104). The second parallel ridges (104) are oriented substantially orthogonally with respect to the first parallel ridges (102). In this embodiment, the second parallel ridges (104) have a height which is greater than the height of the first parallel ridges (102). Furthermore, in this embodiment, the second plurality of parallel spaced apart ridges (104) include contact portions (106) for retaining a support structure at a desired location within a flat panel display device. Hence, when a support structure is inserted between at least two of the contact portions (106) of the multi-level support structure (100), the support structure is retained in place, at a desired location within the flat panel display device, by the contact portions (106).

Abstract translation: 一种用于将支撑结构保持在平板显示装置内的多级矩阵结构（100）。 在一个实施例中，多级矩阵结构（100）由第一平行脊（102）组成。 多级矩阵结构（100）还包括第二平行脊（104）。 第二平行脊（104）相对于第一平行脊（102）基本正交地定向。 在该实施例中，第二平行脊（104）的高度大于第一平行脊（102）的高度。 此外，在该实施例中，第二多个平行间隔开的​​脊（104）包括用于将支撑结构保持在平板显示装置内的期望位置处的接触部分（106）。 因此，当在多层支撑结构（100）的至少两个接触部分（106）之间插入支撑结构时，支撑结构被保持在平板显示装置内的所需位置的适当位置，由 接触部分（106）。

公开(公告)号：WO0051154A8

公开(公告)日：2000-11-23

申请号：PCT/US0001940

申请日：2000-01-26

Applicant: CANDESCENT TECH CORP

Inventor： CHAKRAVORTY KISHORE K ,  NADI FARIBORZ ,  SPINDT CHRISTOPHER J ,  HANSEN RONALD L ,  STANNERS COLIN D

IPC: H01J3/02 ,  H01J9/02 ,  H01J29/02 ,  H01J1/02

CPC classification number: H01J9/148 ,  H01J3/022 ,  H01J29/02

Abstract: A structure and method for forming a column electrode for a field emission display device wherein the column electrode (702) is disposed beneath the field emitters and the row electrode. In one embodiment, the present invention comprises depositing a resistor layer (706) over portions of a column electrode (702). Next, an inter-metal dielectric layer (708) is deposited over the column electrode. In the present embodiment, the inter-metal dielectric layer (708) is deposited over portions of the resistor layer (706) and over pad areas (704a, 704b) of the column electrode (702). After the deposition of the inter-metal dielectric layer (708), the column electrode (702) is subjected to an anodization process such that the exposed regions of the column electrode (702) are anodized. In so doing, the present invention provides a column electrode structure (702) which is resistant to column to row electrode shorts and which is protected from subsequent processing steps.

Abstract translation: 一种用于形成用于场致发射显示装置的列电极的结构和方法，其中列电极（702）设置在场发射极和行电极之下。 在一个实施例中，本发明包括在列电极（702）的部分上沉积电阻层（706）。 接下来，在列电极上沉积金属间介电层（708）。 在本实施例中，金属间介电层（708）沉积在列电极（702）的电阻层（706）和焊盘区域（704a，704b）的部分上。 在沉积金属间介电层（708）之后，对列电极（702）进行阳极氧化处理，使得列电极（702）的暴露区域被阳极氧化。 在这样做时，本发明提供了一种对柱对电极短路有抵抗能力的列电极结构（702），其不受后续处理步骤的保护。

公开(公告)号：WO0034973B1

公开(公告)日：2000-09-21

申请号：PCT/US9929354

申请日：1999-12-08

Applicant: CANDESCENT TECH CORP ,  ADVANCED TECH MATERIALS

Inventor： BARTON ROGER W ,  NARAYANAN KOLLENGODE S ,  MACKEY BOB L ,  MACAULAY JOHN M ,  HOPPLE GEORGE B ,  SCHROPP DONALD R JR ,  NYSTROM MICHAEL J ,  GOPALAKRISHNAN SUDHAKAR ,  PEI SHIYOU ,  XU XUEPING

IPC: H01J9/24 ,  H01J29/02 ,  H01J29/86 ,  H01J31/12 ,  H01J1/62 ,  H01J1/88 ,  H01J19/42 ,  H01J63/04

CPC classification number: H01J9/242 ,  H01J29/028 ,  H01J29/864 ,  H01J31/127 ,  H01J2329/863 ,  H01J2329/8635 ,  H01J2329/864 ,  H01J2329/8645 ,  H01J2329/866

Abstract: A flat-panel display contains a pair of plate structures (20, 22) separated by a spacer (24) having a rough face (54, 56). When electrons strike the spacer, the roughness in the spacer's face causes the number of secondary electrons that escape the spacer to be reduced, thereby alleviating positive charge buildup on the spacer. As a result, the image produced by the display is improved. The spacer facial roughness can be achieved in various ways such as depressions and/or protuberances. Various techniques are presented for manufacturing the display, including the rough-faced spacer.

Abstract translation: 平板显示器包含由具有粗糙面（54,56）的间隔物（24）分开的一对板结构（20,22）。 当电子撞击隔离物时，隔离物表面的粗糙度导致逃离隔离物的二次电子的数量减少，由此减轻隔离物上的正电荷累积。 结果，显示器产生的图像得到改善。 间隔件面部粗糙度可以通过各种方式实现，例如凹陷和/或突起。 介绍了用于制造显示器的各种技术，包括粗糙表面的垫片。

公开(公告)号：WO9923689A9

公开(公告)日：1999-08-12

申请号：PCT/US9822761

申请日：1998-10-27

Applicant: CANDESCENT TECH CORP

Inventor： KNALL JOHAN N

IPC: H01J9/02 ,  H01L21/00

CPC classification number: H01J9/025

Abstract: A technique for creating a patterned coating entails forming a first region (26) over a primary component (22). A second region (28) is formed over part of the first region. The first region is etched so as to undercut the second region, thereby forming a gap (30) below part of the second region. Coating material is then provided over the structure. Due to the presence of the gap, the coating material accumulates over the structure in a pair of segments spaced apart along the gap. One coating segment (32A) overlies the primary component. The other coating segment (32B) overlies the second region.

Abstract translation: 用于形成图案化涂层的技术需要在主要部件（22）上方形成第一区域（26）。 第二区域（28）形成在第一区域的一部分之上。 蚀刻第一区域以底切第二区域，由此在第二区域的一部分下方形成间隙（30）。 然后在结构上提供涂层材料。 由于存在间隙，涂层材料在沿着间隙间隔开的一对段中累积在结构上。 一个涂层部分（32A）覆盖主要部件。 另一个涂层段（32B）覆盖第二区域。